Abstract
The applications and economics for micro‐LED based displays require micro‐LEDs with critical dimension (CD) below 20 microns, with continuous push towards sub 5 microns regime. In this work, the implications of such requirement on the manufacturing and massive parallel transfer ofmicro‐LEDs are discussed from a process engineering perspective. Any high volume manufacturing (HVM)‐compatible massive transfer process must ‐at least‐ tolerate ± 10% variability (3σ) in microLED CD and height. It is inevitable that the display industry will leverage the learnings and methodologies best known in the semiconductors industry for process control, defect and yield management for HVM.
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