5. Fast Processor Recover Techniques with Micro Rollback

Abstract

The precursory proposed techniques for on-line observation of processor components and signals was developed in order to detect errors within a single clock cycle. According to Fig. 16, this is a precaution to carry out a fast error handling procedure in order to avoid a functional error. In this thesis, the focus on a fast error detection and recovery is directed at embedded processor- or micro-controller-based applications with a highly safety-critical relevance or strong real-time constraints. Methods should have a high efficiency, that means the overhead should be significantly less than the silicon area for TMR or quadruple modular redundancy. Furthermore, different handling- strategies for different fault-classes (transient, permanent) are needed. A distinction between transient effects and permanent faults (of static or dynamic origin) is important, since only permanent faults need additional stand-by hardware for compensation.