4H-SiC superjunction trench MOSFET with reduced saturation current

Abstract

A novel 4H-SiC superjunction trench metal oxide semiconductor field effect transistor (SJ-TMOS) is proposed in this paper. The device features a grounded P+ buried layer below the P-body, an oxide trench beneath the gate, and a P-region surrounding the oxide trench. The P-region, grounded P+ buried layer, and P-body serve as a three-level buffer (TLB) to lower the saturation current and thus improve the short-circuit ruggedness. Moreover, the P-region, P+ buried layer and N-drift form an SJ structure to decrease the specific on-resistance (Ron,sp) and increase the breakdown capability. Compared with conventional trench MOSFET (C-TMOS), the saturation current for SJ-TMOS is drastically lowered and thus the short-circuit time (tsc) extends by 175%. Meanwhile, the Ron,sp decreases by 45% and the breakdown voltage increases by 10%. In addition, the SJ-TMOS exhibits a low gate-to-drain charge (Qgd) due to the low permittivity of oxide trench and the nonlinearity in SJ capacitance characteristics.