40-GHz operation of a single-flux-quantum (SFQ) 4 × 4 switch scheduler

Abstract

We designed a single-flux-quantum (SFQ) scheduler for a 4×4 network switch. It receives requests serially and arbitrates them. Fair scheduling is achieved by using a round-robin priority pointer at each output port. The pointer is updated so that the input port that was granted permission has the lowest priority in the next scheduling cycle. We divided the scheduler into sub-blocks, which were separately designed. The sub-blocks, which have asynchronous interfaces, were then connected with passive transmission lines. Ladder-type on-chip clock generators were included in the circuit for high-speed operation. Using logic simulation, we verified the scheduler test circuit. The scheduler test circuit was composed of about 3000 Josephson junctions. We tested the scheduler circuit at high speed and confirmed correct operations at over 40GHz.