Abstract
Variable Length Codes (VLC) are used to transfer same amount of digital information in relatively short period of time. In variable length coding, the characters with higher probability of occurrence are assigned shorter bits sequence and the characters with less probability of occurrence are assigned relatively longer bits sequence. However, due to variable length nature of codes, the decoding circuitry at the receiving end loses the synchronization due to single or multiple bit inversions. This typically happens when data is transmitted through a Binary Symmetric Channel (BSC). This paper investigates synchronizing scheme to control the error propagation due to single or multiple bit inversions through BSC. The hardware implementation of the proposed algorithm has been presented using a hardware description language. The functional level simulation of the implementation is discussed to test the proposed algorithm.
Highlights
Variable Length Codes (VLC) are considered to be optimal source codes
We discuss the general problem of loss of synchronization and briefly outline the objectives of this research which addresses some of those problems
During the data transmission using variable length coding through a binary symmetric channel, single or multiple bits of data may be inverted depending upon the channel characteristics
Summary
Variable Length Codes (VLC) are considered to be optimal source codes. A typical example of VLC is a Huffman Code [1]. The loss of synchronization will continue until the last bit of a decoded sequence coincides with the last bit of a codeword in the uncorrupted sequence This limitation of VLC is illustrated in Example I. This case shows that due to single bit inversion, we lost 3 source symbols. The general dynamic behavior of a decoder operating on data transmitted through a channel corrupted by Gaussian noise has not been widely investigated In such cases, every transmitted bit might be inverted. The bit inversion through a noisy channel may itself corrupt synchronizing the code words. Synchronization recovery scheme is proposed to limit the error propagation due to bit inversions. As a result of execution of the decoding algorithm, variable length code words which are nearest to the received sequence will be decoded.
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