Abstract

This paper proposes an innovative 3D thermoelectric structure which significantly reduce the componet size without deterioration of sensor performance. Based on complementary metal-oxide-semiconductor (CMOS) transistor compatible process, this 3D thermoelectric structure is demonstrated and fabricated by combining front-side silicon anisotropic wet etching and aluminum sacrificial layer etching technique. The voltage responsivity of derived 3D thermoelectric structure with 180×180 µm2 pixel size can be as high as 190 V/W in vacuum. This new thermoelectric structure shows its potential to be an excellent pixel structure of infrared sensor array for infrared recognition applications.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call