3D integration of CMOS and MEMS using mechanically flexible interconnects (MFI) and through silicon vias (TSV)

Abstract

A 3D integration scheme for integrating a state-of-the-art CMOS IC with an arbitrary MEMS/sensor chip is reported. The integration scheme consists of a CMOS IC and a MEMS chip stacked on top of each other with the electrical interconnections between the chips being made using mechanically flexible interconnects (MFIs). In order to expose the MEMS/sensor device to the environment for sensing, the back side of the MEMS chip is assembled to the top side of the CMOS IC, with through silicon vias (TSVs) used to route the electrical signals from the MEMS devices on top side of the chip to the back side of the chip. Mechanically flexible interconnects are wafer-level batch fabricated interconnect structures that have high compliances in both in-plane and out-of-plane directions. The tapered interconnect design and curved beam profile allows the beam to use the 100% of the 20µm stand-off height without being damaged or undergoing a significant yielding. MFIs can be assembled using a flip-chip bonder and a key to successful bonding is the polymer ring technology that confines the solder to the tip of the MFIs during the reflow process. The second essential component in this integration scheme is the Through Silicon Via (TSV) technology that can be fabricated in wafers that already has sensitive MEMS devices (i.e., for post-MEMS TSV fabrication); the fabrication process does not require the use of a Chemical Mechanical Planarization (CMP) process on the device side of the wafer, and the use of “mesh” membrane allows efficient seed layer formation in relatively thick MEMS wafers. In this paper, the design, the fabrication, the mechanical simulation, mechanical characterization and assembly results for MFIs are reported. Fabrication result for the TSV technology is also reported.