3.5mW W-Band Frequency Divider with Wide Locking Range in 90nm CMOS Technology

Abstract

The frequency divider (FD) is one of the key components in very-high-frequency (VHF) PLLs. Conventionally, injection-locked frequency divider (ILFD) , Miller frequency divider, and CML static divider are widely used in various applications. Among these dividers, the ILFD has the highest operation frequency, but the locking range is limited. On the other hand, the static FD covers a wide locking range, but its operation frequency is low and the power consumption is usually high. Since a FD connected to a VCO operates at the highest frequency, the power dissipation and the locking range of a VHF FD should be carefully considered. In a PLL, due to the process and temperature variations, the locking range of the ILFD must be several times larger than the tuning range of the VCO. Thus, it is challenging to design a wide locking-range and low-power ILFD in the millimeter-wave applications. To achieve a higher operational frequency for an ILFD, the distributed LC oscillator is adopted. To widen the locking range of an ILFD, the transconductance-enhancement technique is presented. In this paper, two low-power ILFDs have a locking range of 85.1 to 96.3 GHz and 98.9 to 105.2 GHz, respectively.