Abstract
This work describes a 10 b 70 MHz CMOS digital-to-analogue converter (DAC) for video applications. The proposed DAC is composed of a unit decoded matrix for 7 MSBs and a binary weighted array for 3 LSBs, considering linearity, power consumption, routing area and glitch energy. A new switching scheme for the unit decoded matrix is developed to further improve the linearity. Cascode current sources and differential switches with a new deglitching circuit improve the dynamic performance.
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