3-D integrated heterogeneous intra-chip free-space optical interconnect

Berkehan Ciftcioglu,Gary Wicks,Ioannis Savidis,Shang Wang,Hui Wu,Manish Jain,Michael Huang,Duncan Moore,Jianyun Hu,Rebecca Berman,Eby G Friedman

doi:10.1364/oe.20.004331

Abstract

This paper presents the first chip-scale demonstration of an intra-chip free-space optical interconnect (FSOI) we recently proposed. This interconnect system provides point-to-point free-space optical links between any two communication nodes, and hence constructs an all-to-all intra-chip communication fabric, which can be extended for inter-chip communications as well. Unlike electrical and other waveguide-based optical interconnects, FSOI exhibits low latency, high energy efficiency, and large bandwidth density, and hence can significantly improve the performance of future many-core chips. In this paper, we evaluate the performance of the proposed FSOI interconnect, and compare it to a waveguide-based optical interconnect with wavelength division multiplexing (WDM). It shows that the FSOI system can achieve significantly lower loss and higher energy efficiency than the WDM system, even with optimistic assumptions for the latter. A 1×1-cm2 chip prototype is fabricated on a germanium substrate with integrated photodetectors. Commercial 850-nm GaAs vertical-cavity-surface-emitting-lasers (VCSELs) and fabricated fused silica microlenses are 3-D integrated on top of the substrate. At 1.4-cm distance, the measured optical transmission loss is 5 dB, the crosstalk is less than -20 dB, and the electrical-to-electrical bandwidth is 3.3 GHz. The latter is mainly limited by the 5-GHz VCSEL.

Highlights

The performance of microprocessors continues to improve with technology scaling, especially through the increase of the number of cores
We report the design, fabrication, integration and measurement results of the first chip-scale prototype to demonstrate this intra-chip free-space optical interconnect (FSOI) system
The analysis demonstrated that the FSOI system can support 10-Gb/s data rate with 0.5pJ/bit energy efficiency for up to 3.24-cm transmission distance, which is diagonally crossing a typical 2.3x2.3-cm2 microprocessor chip

Summary

Introduction

The performance of microprocessors continues to improve with technology scaling, especially through the increase of the number of cores. Communications within these chips, e.g. between processor cores and at the memory/processor interface, will demand larger bandwidth density, smaller latency and better signal integrity. To meet these demands, conventional electrical interconnects need better materials to minimize transmission loss, and increased circuit complexity (e.g. equalization) to achieve larger bandwidth, both of which increase energy consumption. For inter-chip communications, optical interconnects with point-to-point topologies have already been developed, typically using on-board waveguides and directly modulated lasers [3, 4]

Methods

Findings

Discussion

Conclusion