3-D Compact Marchand Balun Design Based on Through-Silicon via Technology for Monolithic and 3-D Integration

Abstract

An original concept of 3-D through-silicon via (TSV)-based Marchand baluns and its design methodology is proposed for on- chip and 3-D integration. By utilizing a 3-D packaging process that includes a TSV and redistribution layer (RDL), a meander coupling path is established and embedded in the vertical direction of the substrate for balun design. The 3-D structure can effectively reduce the on- chip area while maintaining good balance characteristics. Furthermore, the structure can be flexibly integrated with 3-D integrated circuits (3-D ICs) to realize signal conversion between different stacking tiers. An equivalent circuit model based on the TSV-to-TSV coupling channel and coupled transmission line has been established for initial estimation before electromagnetic (EM) optimization. To shorten the design cycle, a specific flow is proposed to meet the structural particularity and different application scenarios. To verify the design method and flow, a design case is analyzed and EM simulated with the antenna feeding network as the target application. The EM simulation results show that the design can work at 43–82 GHz with an amplitude imbalance of less than 0.3 dB and a phase imbalance of less than 1.3°, which meets the requirements of balanced feeding. It only costs a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.084\,\,\lambda _{\text {g}}\,{\times }\,0.009\,\,\lambda _{\text {g}}$ </tex-math></inline-formula> footprint, which is far lower than that of the conventional planar types.