Abstract
28 nm FD-SOIプロセスにおける基板バイアスを用いた低雑音増幅器の低消費電力化
Full Text
Sign-in/Register to access full text options
Published version (
Free)
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: The transactions of the Institute of Electrical Engineers of Japan.C
Paper Title
Journal
Date