22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration

Abstract

SARs are one of the most energy-efficient ADC architectures for medium resolution and low-to-medium speed. To improve the limited bandwidth of SAR ADCs, the time-interleaved (TI) structure is often used [1,2]. However, TI ADCs have several issues caused by mismatches between channels, such as offset, gain, and timing-skew errors. Unlike the other errors, timing-skew causes errors that increase with input signal frequency. Considering that the TI structure is typically employed to increase bandwidth, timing-skew can be a dominant error source of TI ADCs. Recent works [1,3] have demonstrated a background timing-skew calibration using a dedicated additional channel as a timing reference. In this work, we present a TI SAR ADC that enables background timing-skew calibration without a separate timing reference channel and enhances the conversion speed of each channel.