18nm n-channel and p-channel Dopingless Asymmetrical Junctionless DG-MOSFET: Low Power CMOS Based Digital and Memory Applications

Namrata Mendiratta,Suman Lata Tripathi

doi:10.1007/s12633-021-01417-5

Abstract

In this paper, an 18nm dopingless asymmetrical junctionless (AJ) double gate (DG) MOSFET has been designed for suppressed short channel effects (SCEs) for low power applications. A desired ON and OFF state current ratio with subthreshold performance parameters under limit, is the major focus of the proposed transistor. Different sensitivity parameters of dopingless AJ DG MOSFET such as drain extension, length of gate overlapping and oxide thickness are compared with the AJ DG MOSFET with doped channel region. The ON-state current obtained is 3.80 x \({10}^{-6 }\)A/µm with reduced OFF-state leakage current up to1.37 x \({10}^{-17 }\)A/µm. The subthreshold slope (SS) and drain induced barrier lowering (DIBL) of the device obtained are 59.5 mV/decade and 10.5 mV/V respectively. Temperature analysis of proposed device at various temperature such as 250 K,300 K, 350 and 400 K shows a small variation in OFF-state current (< 15 %). Additionally, a p-channel AJ DG MOSFET along with n-channel AJ DG MOSFET are designed and their performance is evaluated for CMOS inverter circuit and 6T SRAM cell. All design and analysis have been done with a 2D/3D Visual TCAD device simulator.

Highlights

The size of the semiconductor devices is being continuously reduced and has entered into the nanoscale range[1]
Every two years the number of transistors doubles because the size of the MOSFET is reduced. oxide semiconductor field effective transistor (MOSFET) is a semiconductor device used in various applicationslike for analog and RF applications to handle the radio frequency signals that are high in power from devices like television, radio transmitter, amplifiers [2].For reduction in cost and to increase the speed of the device double gate MOSFETs are taken into consideration[3]
The proposed dopingless asymmetric junctionless double-gate MOSFET has gate placed in an unsymmetrical manner with different doping concentrations of drain, source and gate.The ON and OFF state of the MOSFET determines the length of the channel

Summary

Introduction

The size of the semiconductor devices is being continuously reduced and has entered into the nanoscale range[1]. The MOSFET designed is used as A RF switch for the application in wireless telecommunication and is capable of storing more energy than the conventional device.Orouji et al.[19] proposed a SOI MOSFET with double step buried oxide having the advantages of bulk structure as well as SOI structure. This device reduces the self-heating effects with degrade the device performance.

Device Structure and Dimensions

Conclusion