180 degree hybrid (rat-race) junction on CMOS grade silicon with a polyimide interface layer

G.E Ponchak,J Papapolymerou

doi:10.1109/smic.2003.1196678

180 degree hybrid (rat-race) junction on CMOS grade silicon with a polyimide interface layer

G.E Ponchak, J Papapolymerou

https://doi.org/10.1109/smic.2003.1196678

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Publication Date: Apr 11, 2003

Citations: 10

Affiliation: Georgia Institute of Technology

#CMOS Grade Silicon #Polyimide Interface Layer + Show 8 more

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Abstract

180-degree hybrid junctions can be used to equally divide power between two output ports with either a 0 or 180-degree phase difference. Alternatively, they can be used to combine signals from two sources and output a sum and difference signal. The main limitation of implementing these on CMOS grade silicon is the high loss associated with the substrate. In this paper, we present a low loss 180-degree hybrid junction on CMOS grade (15 /spl Omega/-cm) silicon with a polyimide interface layer for the first time. The divider utilizes Finite Ground Coplanar (FGC) line technology, and operates at a center frequency of 15 GHz.

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