150 V, 100 mΩ, SOI power LDMOS with high avalanche current capability for MHz frequency power switching applications

Abstract

To enable MHz frequency switching in high density power converters, power MOSFETs with very low gate charge and low on resistance are needed. In this paper, we report on the design and fabrication of a 150V, 100 mΩ, chip-scale SOI lateral power MOSFET. The power LDMOS transistor is based on the SOI RESURF principle and fabricated in a 0.35um CMOS foundry using a custom process. The device incorporates the “adaptive RESURF” principle as well as a P+ buried layer tied to the source in order to achieve high avalanche current capability. The adaptive RESURF technique is implemented by controlling the spacing between the N+ drain and the shallow trench isolation which runs across the drift region. This allows a drain buffer region to be formed without requiring any additional masks or ion implants. The source metal extends above the drift region as a field plate to reduce the electric field between drain and gate without increasing Miller capacitance. The device is packaged in a low-inductance, low profile flipchip package. The Qg×Rdson figure-of-merit for this device is considerably lower than state of the art commercial power MOSFETs.