140–220 GHz SPST and SPDT Switches in 45 nm CMOS SOI

Abstract

This letter presents 140-220 GHz single-pole single-throw (SPST) and single-pole double-throw (SPDT) switches built using 45 nm semiconductor-on-insulator (SOI) CMOS technology. A tuned-shunt topology is used to minimize the insertion loss, and the transistor layout results in very low ground inductance and high isolation. The double-shunt SPST switch results in an insertion loss of 1.0 dB and an isolation of 20 dB, while the SPDT switches result in an insertion loss of 3.0 dB and an isolation of 20-25 dB, all at 180 GHz. The switches are well matched with a return loss at all ports greater than 10 dB at 140-220 GHz. The work shows that advanced CMOS nodes can be used for transmit-receive switches in emerging 140-220 GHz CMOS systems.