Abstract

This paper presents a 120 GHz low power, high gain, wideband active balun design in 65nm CMOS. The active balun is realized using current-reuse cascode topology and common source topology. The active balun exhibits a measured small signal where S21 and S31 are -5 ± 1.3 dB and -4.8 ± 0.5 dB, respectively, from 113GHz to 133 GHz. The measured gain imbalance and phase imbalance is kept less than 1.5 dB and 2°, respectively, from 113 GHz to 133 GHz. The chip occupies 460 x 460 μm2 including the pad. Total power consumption is 4mW from a 1 V supply voltage. To our best knowledge, this is the first active balun operating in the D-band.

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