Abstract

Temperature dependent body bias modulation of array reduces SRAM VMIN thereby reducing overall dynamic power. Fully Depleted Silicon On Insulator (FDSOI) technology offers single P-well SRAM bit cell that can be biased to positive voltages upto +1.1V to boost write-ability at cold temperatures and upto-1.1V to boost stability at hot temperatures. In this paper, we present the architecture and design of a 3:1 body bias power switch that can transmit positive, negative and zero voltage depending on the input from an on-chip temperature sensor. All the devices operate within their safe operating area (SOA) ensuring reliability. The implementation was done using extended gate devices supporting 1.8V operation in 28nm planar Ultra-Thin Box and Body, FDSOI CMOS (UTBB FDSOI) technology.

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