100 Gb/s High Throughput Serial Protocol (HTSP) for data acquisition systems with interleaved streaming

Abstract

Demands on Field-Programmable Gate Array (FPGA) data transporthave been increasing over the years as frame sizes andrefresh rates increase. As the bandwidths requirements increasethe ability to implement data transport protocol layersusing “soft” programmable logic becomes harder and start to require hardenIP blocks implementation.To reduce the number of physical links and interconnects, it is common fordata acquisition systems to require interleaving of streams on the same link(e.g. streaming data and streaming register access).This paper presents a way to leverage existingFPGA harden IP blocks to achieve a robust, low latency 100 Gb/spoint-to-point link with minimal programmable logic overheadgeared towards the needs of data acquisition systems with interleaved streaming requirements.