0.9 to 2.5 GHz Sub-Sampling Receiver Architecture for Dynamically Reconfigurable SDR

Abstract

This work proposes an architecture for dynamically reconfigurable multi-standard radio receiver based on the principle of sub-sampling. The proposed receiver has a unique capability to detect the carrier frequency of the incoming signal, estimate its bandwidth and identify if the carrier is present in one of the target standard bands. In addition, sub-sampling is performed at an early stage in the receiver chain to process the signal in the discrete-time domain and to bring the analog-to-digital converter closer to the antenna as in a universal software defined radio (SDR). This adds to the flexibility and reconfigurability which are generally needed for SDR based RF receivers. Moreover, the proposed radio architecture operates at low clock rates, thanks to sub-sampling, leading to less complex clocking circuitry and low power consumption. The proposed receiver architecture RF front-end is modeled in Verilog-AMS behavioral models and the digital signal processing is implemented in Simulink-Matlab. The complete receiver architecture has been verified to detect and process three different bands belonging to three different standards (GSM, UMTS and WLAN) with the carrier frequency ranging from 0.9 GHz to 2.5 GHz with a maximum signal bandwidth of 22MHz and input dynamic range from -109 to -20 dBm.