0.15 µm Electron Beam Direct Writing for Gbit Dynamic Random Access Memory Fabrication

Abstract

This paper describes 0.15 µ m electron beam (EB) direct writing techniques for Gbit dynamic random access memory (DRAM) fabrication. In order to use EB direct writing for reliable fine pattern fabrication on the 0.15 µ m level, an EB direct writing system technique, a resist process technique, a cell projection (CP) mask preparation technique, which is indispensable for improving the writing throughput, and a data preparation technique with proximity effect correction must be improved respectively and combined successfully. The proximity effect correction for all fine patterns in a full-scale DRAM chip is especially important for achieving a CD accuracy of less than 0.02 µ m, which is required for device fabrication and margin. For obtaining the reliable shot stitching accuracy between CP and variably shaped (VS) EB writings, we adopted the cross-correlation method, which was used to decide the size and center position of the CP shot. A single-layer resist system without an over-coated conducting layer was used for reliable device fabrication. In addition, for improving the CD accuracy for all 0.15 µ m designed patterns in a full-scale chip, we developed a data partition process suitable for CP mask pattern data and an improved 1-dimenshinal(1-D) calculation method for proximity effect correction. Utilizing these techniques, the full-scale 4Gbit DRAM, which was designed with 0.15 µ m minimum feature size, was fabricated successfully with 0.05 µ m (| mean|+3σ) overlay accuracy, 0.02 µ m (| mean+3σ) stitching accuracy, and less than 0.02 µ m (3σ) CD accuracy, all of which were sufficient for the required device fabrication.