0.5–6 GHz low-voltage low-power mixer using a modified cascode topology in 0.18 [micro sign]m CMOS technology

Abstract

A broadband low-voltage low-power down-conversion mixer using a 0.18 µm standard CMOS process is presented. The proposed mixer uses a modified cascode topology with a bulk-injection technique to achieve low-voltage and low-power performance. The mixer features a maximum conversion gain of 6 dB at a radio frequency (RF) of 2.4 GHz, a single-sideband (SSB) noise figure of 15.2 dB, and an input third-order intercept point (IIP3) of 0 dBm. Moreover, the chip area of the mixer core is only 0.15×0.23 mm2. The measured 3 dB RF bandwidth is from 0.5 to 6 GHz with an intermediate frequency (IF) of 100 MHz. The optimum DC supply voltage (VDD) can be scaled down to 0.7 V with a drain current within 0.4 mA. The supply voltage and DC power of this circuit can be compatible with an advanced 90 or 65 nm CMOS technology.