Abstract

The article shows the method of constructing the MMIC power limiter. The purpose of this research is to increase the burnout level. We considered a classical two-stage cir-cuit on anti-parallel p-i-n diodes. The idea of increasing the burnout level is to redis-tribute currents, so that at the burnout power at the first and second stages, the current is equal to the saturation current – 0.41–0.45 A / 100 µm. To do this, a simulation of the circuits was carried out – the ratio of the capacity of the first to the second stage 1:1, 2:1, 3:1 and 4:1. The design circuits were manufactured at p-i-n diode GaAs tech-nology of JSC RPC “Istok” named after Shokin, the height of the diode barrier is 1,1 V / 1 mA, the breakdown voltage is 45 V / 100 µA. The results of probe measurements S-parameters of power limiters and measure-ments of dynamic characteristics in the fix-ture are presented. Devices in the frequency range from 1 GHz to 16 GHz have losses less than 0.8 dB and VSWR input and output less than 2. The burnout level in continu-ous power at a frequency of 10 GHz was: for topology 1:1 — 45.3 dBm, 2:1 — 48.3 dBm and for topology 3:1 — 49.6 dBm. Under the same conditions, serial MMIC power limiters of foreign company were investigated. The burnout power density was ~20 W / 100 µm of the periphery, for the JSC RPC “Istok” named after Shokin technology, which exceeds the level of the investigated foreign analogues.

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