Zero Common-mode Voltage Research Articles

Dual three-phase permanent magnet synchronous motors model predictive torque control based on zero common-mode voltage

This article proposes a multi-vector model predictive torque control strategy based on zero common-mode voltage to suppress common-mode voltage and harmonic currents in a dual three-phase permanent magnet synchronous motor. Firstly, 20 zero common-mode voltage vectors are selected from the traditional 64 basic voltage vectors. By synthesizing these 20 vectors into 6 virtual voltage vectors (VVV), control over the harmonic plane is achieved, reducing harmonic currents and eliminating common-mode voltage. Then, the control error of the flux is reduced by increasing the number of vectors to achieve the purpose of reducing the flux ripple. Finally, through duty cycle modulation, multi-vector model predictive torque control extends the modulation range to the entire sector plane. Simulation results confirm that this strategy can effectively suppress harmonic currents and common mode voltage.

An Optimized Model Predictive Control Method With Fixed Switching Frequency for Eliminating Common-Mode Voltage of Five-Level Converters

In this paper, an optimized model predictive control (MPC) method with fixed switching frequency (FSF) is proposed to eliminate the common-mode voltage (CMV) and balance the capacitor voltage. Firstly, the zero CMV vector diagram is divided by finite control set MPC (FCS-MPC) to obtain the candidate vectors effectively. Then, in order to control the capacitor voltage and avoid the great computational burden originated from the redundant switching combinations, a piecewise control scheme is proposed to determine the required ones directly. The sequence generated by the selected vectors is further optimized for the purpose of saving switching transitions according to the internal and external parts of the vector diagram. Finally, the duty ratios are evaluated based on the results of the FCS-MPC in dividing sectors so as to avoid any extra complex calculation. The experimental evaluation has been carried out to validate the feasibility and effectiveness of the proposed method.

Integrated Modulation of Dual-Parallel NPC Inverters With Eliminated CMV

An integrated zero common mode voltage (ZCMV) modulation algorithm is developed in this research for dual-parallel neutral-point-clamped (NPC) inverters treated as an integrated system. While the conventional methods achieve CMV elimination with the cost of worse harmonic performance, the proposed method guarantees zero CMV and better current quality simultaneously by taking advantage of the extra space vectors provided by paralleling. Specially designed switching sequences are developed to maintain a balanced neutral point of DC-bus and ensure the averaged circulating current being zero, which is critical to the parallel operation and normal function of NPC inverters. In addition, although the switching sequence design is complicated, a simple approach is proposed and implemented on a commonly used digital signal processor (DSP). A laboratory prototype is also developed and used to test the system performance under steady-state conditions and dynamic process in grid-connected operation. Compared with conventional ZCMV modulation, experimental results verify the effectiveness of the integrated modulation in eliminating CMV, in addition to the dramatically reduced output current distortion.

A Novel Common-Ground-Type Nine-Level Dynamic Boost Inverter

Recently, inverters with a common ac and dc ground are gaining significant interest due to their zero common-mode voltage that made them particularly attractive for the solar photovoltaic application. However, the dc source current of the existing topologies is discontinuous, and their voltage gains are limited. This article proposes a novel common-ground-type boost inverter that achieves continuous dc source current with significantly enhanced dynamic voltage gain. It consists of one boost inductor, four capacitors, nine power MOSFETs, and two power diodes. Voltage boosting and generation of nine-level ac voltage are achieved concurrently within a single-stage operation. The operation of the proposed CGT-9L-BI inverter is analyzed. Simulation and experimental results are presented for validation.

Virtual Voltage Vector Based Model Predictive Control for a Nine-Phase Open-End Winding PMSM With a Common DC Bus

Finite control set model predictive control (FCS-MPC) is a control strategy with fast response and a simple and flexible structure. However, when the control plant is complicated such as a multiphase electric machine, the application of FCS-MPC faces clear challenges. This article for the first time investigates the FCS-MPC for a nine-phase open-end winding (OW) permanent magnet synchronous machine, which is powered by nine H-bridge inverters with a common dc bus. First, in order to solve the challenge of substantial iterations in the conventional FCS-MPC, the number of control sets is simplified by reconfiguring the high level in switching states. Then, to eliminate the zero-sequence current caused by the common dc bus, the zero common-mode voltage (CMV) vector is selected. Subsequently, duty-ratio optimization is used to further reduce the available vectors. By the abovementioned measures, the number of iterations is reduced from 19 171 to 18. In order to suppress the harmonic current, the virtual voltage vectors (VVs) are designed. Each VV is synthesized by two zero CMV vectors, which can eliminate all the third and fifth harmonics in the output voltage. In addition, to achieve symmetrical pulsewidth modulation pulse sequences, a general pulse generation method for OW drive systems is proposed. Finally, the control performance of different control sets and harmonic weighting factors are evaluated and compared, and the experimental results have verified the effectiveness of the proposed methods.

Performance Analysis of Multi-Carrier PWM and Space Vector Modulation Techniques for Five-Phase Three-Level Neutral Point Clamped Inverter

In industries, the demand for multi-phase Multi-Level Inverters (MLIs) increases as they have reduced switching loss, Common Mode Voltage (CMV) and voltage stress across switches. The Multi-Carrier PWM (MCPWM) and Space Vector Modulation (SVM) techniques are predominantly used for controlling the inverter. This paper discusses various PWM techniques like PD, POD, APOD, IC, PSC, VFC PWM and SVM (OFV and SVM with Zero CMV) for 5-phase NPC 3L Inverter. Each PWM techniques gives better results in voltage THD/ dc-link balancing/ CMV. The SVM is significant for obtaining better performances in all these aspects. The Optimized Five Vector (OFV) which has 113 vectors is preferred than normal SVM as it has inequality relationship between 5-phase voltages. Though, OFV gives better results in terms of higher output voltage and lower NPF, the CMV is not eliminated. To eliminate CMV, 51 vectors that generates Zero CMV is selected to drive the inverter where output voltage and NPF is also improved. However, due to the presence of x-y components the distortion is present. The vectors are further reduced to 31 where the x-y components are neglected to reduce the distortion is proposed in this paper. The performance of the inverter drive is enhanced by applying proposed SVM with 31 vectors. The NPF, CMV and losses are calculated for all PWM techniques, also the THD performances of an inverter is found for various techniques. The simulation is carried out for all PWM techniques and the results are verified by experimental results.

Common-Mode Voltage Suppression Strategy Based on Fast MPC for a Five-Level Nested Neutral Point Piloted Converter

This paper, regarding a five-level nested neutral point piloted (NNPP) converter as the research object, analyzes the working mechanism of an NNPP five-level converter and determines the switching commutation circuit and switching principles. To solve the problem of common-mode voltage (CMV) in NNPP five-level converters, a control strategy based on fast model predictive control (MPC) is proposed to effectively suppress common-mode voltage. The control method proposed in this paper is divided into two main parts. First, 19 zero common-mode voltage (ZCMV) vectors are selected from 125 voltage vectors, and 19 ZCMV vectors are optimized to select the best ZCMV vector. Next, according to the switching principles, the effective switching combinations are selected as the effective candidate control set, and proper switching combinations of the optimal ZCMV vector are determined. The effectiveness and validity of the proposed suppression strategy based on fast MPC in terms of the steady state and dynamic performance is confirmed by simulation and experimental results of the five-level NNPP converter.

FS-MPC-Based Speed Sensorless Control of Matrix Converter Fed Induction Motor Drive With Zero Common Mode Voltage

The matrix converter (MC) is often projected as a substitute to voltage source converter due to its numerous advantages, especially in converter fed drive systems, where features like bidirectional power flow, common mode voltage (CMV) elimination, improved source, and load side current quality, are highly desirable. This article presents the speed encoderless control of an induction motor, with the exclusive use of only six switching states of MC that generate zero CMV. The use of only these six states, contrary to the 27 (or 21) states used otherwise, also ensures reduced processor burden. For the control of both source, and load side parameters, multiple objective finite set model predictive control (MO-FS-MPC) is used. MO-FS-MPC is conventionally associated with cumbersome weight tuning, which is eliminated by undertaking a fuzzy decision making approach. Furthermore, a full-order predictive model of an induction motor is used for the prediction of flux, and stator currents, allowing control down to zero motor speed. For the estimation of motor speed, the mechanical model of the motor is used, such that parameter drift is significantly overcome through suitable compensation of the error between predicted, and sensed stator currents.

An Efficient Carrier-Based Modulation Strategy for Five-Leg Indirect Matrix Converters to Drive Open-End Loads with Zero Common-Mode Voltage

This paper presents an efficient carrier-based modulation (CBM) strategy for a five-leg indirect matrix converter (IMC) to drive a three-phase open-end load (OEL) with approximate zero common-mode voltage (CMV) across the load phase. The operating principle of the five-leg IMC fed three-phase OEL is firstly analyzed to select suitable switching states that do not generate any CMV across the load phase. Then, the CBM strategy is developed to control the five-leg IMC in order to overcome the complexity of conventional space vector modulation strategies. Consequently, the gating signals are generated by the comparison of a high-frequency carrier signal with corresponding modulation signals without the computational burden and lookup-table technique. Also, the scheme of five-leg IMC fed OEL can decrease the numbers of power switches as well as acquire advanced features such as higher voltage transfer ratio and better output voltage quality with the three-level waveform. Simulation and experimental results are provided to validate the proposed CBM strategy.

A Simple Modulation Scheme With Zero Common-Mode Voltage and Improved Efficiency for Direct Matrix Converter-Fed PMSM Drives

For the direct matrix converter (DMC) applied to permanent-magnet synchronous motor (PMSM) drives, a novel modulation scheme is proposed in this article, which could reduce the control complexity and improve the efficiency while achieving zero common-mode voltage (CMV). Only three counterclockwise or clockwise rotating vectors are adopted to operate the DMC. The proposed scheme has the inherent ability to generate sinusoidal input currents without explicit control in the modulation. The duty cycle expressions for the three vectors are quite simple without any trigonometric operations. The switching pattern is fixed, saving the need for sector and sequence determination. Therefore, compared with the conventional modulation scheme which also uses only rotating vectors, the proposed scheme could reduce the execution time by over 80%. In addition, it achieves higher efficiency benefiting from the reduced switching actions. Its validity is verified by experimental results on a 2.4-kW DMC-fed PMSM drive prototype.

PWM control method to eliminate Common Mode Voltage in three level T-Type inverters

In this paper, Common-mode voltage (CMV) is responsible for overvoltage stress to the winding insulation and bearing damage of an AC motor. High dv/dt of CMV causes leakage currents, which create noise problems to the equipment installed near the converter. This paper presented modulation strategy to eliminate CMV three level T-Type inverter (Zero CMV 3L T2I) that substantially eliminates CMV. The principles of selecting suitable triangle carrier signals for the T-Type is described. This PWM control method can mitigate the peak value to 95% as compared to the conventional sinusoidal pulse width modulation method. A prototype is constructed to verify the operating principle of the three-level T-Type inverter. Simulation and experimental results are presented.

Common-Mode Current Suppression of Transformerless Nested Five-Level Converter With Zero Common-Mode Vectors

Three-phase transformerless multilevel converters are widely used in the high-voltage photovoltaic power generation systems because of their low total harmonic distortion, high power density, and high conversion efficiency. One three-level flying capacitor converter and dual T-type three-level circuits can be combined to derive the compact and cost-effective nested five-level converter. However, due to the lack of an isolation transformer, the common-mode current is generated to degrade the converter performance. First, the common-mode equivalent circuit model of the nested five-level converter is initially derived to further explore its common-mode current generation mechanism. Then, the zero common-mode space vector modulation (ZCM-SVM) is proposed to reduce the common-mode current, which chooses the specific zero common-mode voltage space vectors to synthesize the reference vector. Then, an advanced coordinate transformation is introduced to realize the flexible sector selection and reduce the complexity of the vector action time calculation. The proposed modulation achieves the common-mode current suppression with high dc bus voltage utilization. Finally, the effectiveness of the proposed ZCM-SVM strategy is verified by simulation and experimental results.

Circulating Current Reduction for Paralleled Inverters With Modified Zero-CM PWM Algorithm

Paralleled inverters are not only a suitable approach to increase the power capacity, but also have the capability of common mode voltage (CMV) reduction, or even elimination. The original zero CMV modulation scheme for paralleled inverters suffers from the current jump problem in phase-leg currents. This current jump phenomenon amplifies the peak values of differential-mode circulating current (DMCC) and zero-sequence circulating current (ZSCC), which is adverse for the design of coupled inductor and common-mode inductor. This paper introduces the modified modulation scheme, which can keep volt-seconds balance in whole fundamental period and mitigate the current jump in phase-leg currents. In addition, the reduction effect of the DMCC and ZSCC can be achieved. To verify the analysis, both the simulation and experimental results are presented, which validates the proposed methods and show that they are beneficial for DMCC and ZSCC reduction.

A Finite Control Set Model Predictive Control Method for Matrix Converter With Zero Common-Mode Voltage

In this paper, a novel finite control set model predictive control (FCS-MPC)-based solution is proposed to eliminate the common-mode voltage (CMV) in matrix converters. Different from the existing MPC-based CMV reduction methods, which usually utilize all the possible switching configurations, in the proposed method, only the six rotating vectors, which produce no CMV, are included in the FCS to synthesize the output voltage and the input current. Therefore, zero CMV can be achieved naturally and no CMV related term needs to be included in the cost function. In addition, compared with other zero CMV methods, e.g., the enhanced space-vector modulation using rotating vectors, the proposed MPC-based method can significantly reduce the computational complexity without detracting the CMV elimination performance. Moreover, a modified four-step commutation strategy is proposed to effectively mitigate the CMV spikes due to the dead time, which usually exists when using the conventional current-based four-step commutation strategy. Finally, the feasibility and effectiveness of the proposed method are validated by using experimental studies.

An Efficient Four-State Zero Common-Mode Voltage PWM Scheme With Reduced Current Distortion for a Three-Level Inverter

In this paper, a new carrier-based pulse width modulation (PWM) strategy providing common-mode voltage (CMV) elimination and reduced current ripple in a three-level neutral-point-clamped inverter is introduced. The employed switching sequences are made up of the three zero CMV (ZCMV) vectors, and one among the three vec-tors is applied at two ends of a half-carrier cycle. The output current ripple characteristics pertaining to those switching sequences are investigated. In a carrier cycle, the root-mean-square current ripple minimization is analyzed and an optimal sequence is derived accordingly. The presented PWM scheme results in a considerably reduced current harmonic distortion in a wide modulation region as compared to the two existing ZCMV schemes on the same average switching frequency. Also, an implementation of sawtooth-carrier-based PWM patterns is proposed for further improvement of the harmonic performance. The algorithm requires small computational burden and is straightforward for an online implementation. Simulation and experimental results are both provided to validate the good performance of the proposed PWM method.

Novel Eliminated Common-Mode Voltage PWM Sequences and an Online Algorithm to Reduce Current Ripple for a Three-Level Inverter

A novel carrier-based zero common-mode voltage (ZCMV) pulse-width-modulation (PWM) algorithm for a three-level (3L) neutral-point-clamped (NPC) inverter based on a group of modified ZCMV PWM sequences is proposed. In a half-carrier cycle containing four consecutive states, one among the three ZCMV switching states is applied twice. This paper proposes four novel ZCMV PWM sequences in addition to those that are realized from switching state arrangements in PWM techniques for the conventional two-level inverter. The harmonic characteristics due to those sequences are investigated in detail. Then, a simple online algorithm to minimize the root mean square current ripple, which can be advantageously extended for an n -inverter, is proposed. Harmonic performance and switching loss characteristic of the proposed ZCMV PWM have been compared to those of a conventional space-vector PWM and a three-state ZCMV PWM with reduced current ripple. Comparative analytical results verified by experimentation have shown that the proposed PWM scheme reduces the current harmonic distortion considerably in a high modulation index range of a 3L NPC inverter.

Eliminated common-mode voltage pulsewidth modulation to reduce output current ripple for multilevel inverters

The paper presents an analysis on the output current ripple in zero common-mode voltage (ZCMV) PWM control of multilevel inverters. The modulation strategy for common-mode voltage (CMV) elimination in multilevel inverters is based on the “three zero common-mode vectors” principle. The space vector diagram, which consists of vectors of ZCMV, is fully explored by properly depicting the base voltage vectors and their corresponding active switching vectors. The switching patterns are limited to those of three switching states each of which is symmetrically distributed. Based on the PWM process simplified to that of a two-level inverter with three allowable switching states and the degree of freedom existing in the switching states arrangement, a novel carrier-based pulsewidth-modulated (PWM) method with optimized output current ripple is proposed. Compared to the existing PWM methods which utilize the same kind of switching patterns, the proposed PWM method has reduced considerably the rms current ripple and total harmonic distortion (THD) of the output current in a wide region of the modulation index. The effectiveness of the proposed method is validated by both simulation and experimental results.

A Modulation Scheme for Matrix Converters With Perfect Zero Common-Mode Voltage

This paper presents a novel space vector modulation (SVM) method combined with a modified four-step commutation to achieve a perfect zero common-mode voltage (CMV) for matrix converters (MCs). The new SVM method was developed by using only rotating input voltage vectors, which results in the CMV for MCs being zero. However, it causes some noise in practical applications that drive MCs with traditional four-step commutation. In order to solve this noise problem, a modified four-step commutation is also proposed to perfectly eliminate the CMV for MCs without any noise. In the modified four-step commutation, a delay time is designed to deal with misjudgment of input voltages. The proposed SVM method and four-step commutation are easily implemented via software and achieve good performance in input/output current waveforms. Prototype experiments were carried out to evaluate the performance of the proposed method.

Common-Mode Voltage and Vibration Mitigation of a Five-Phase Three-Level NPC Inverter-Fed Induction Motor Drive System

Common-mode (CM) voltage is one of the main reasons for the flow of bearing currents in induction motors (IM) that ultimately leads to the bearing failure and causes severe vibrations. For three-phase IM drives, many works have been reported either on the reduction or on the elimination of CM voltages that are generated due to pulse width modulation (PWM) action of the feeding power converters. However, for five-phase IM drives, very few studies are available with the perspective of the CM voltage elimination. Also, the effect of CM voltage on the mechanical vibrations of a five-phase IM has not been reported in the literature. Hence, in this paper, firstly, the modeling of CM current generated in the five-phase IM is done and its expression based on admittance transfer function is derived. Then the CM voltage is eliminated from a five-phase three-level neutral point clamped (NPC) voltage source inverter. The space vector pulse width modulation (SVPWM) technique is developed for the elimination of CM voltages. Only those switching states are selected which give zero CM voltage. The same selected switching states also give the balanced dc link capacitor voltages. Its effect is observed on the mechanical vibration of the motor and it is correlated with the CM current. The mechanical vibration is observed for both, with and without CM voltage elimination. Both the simulation and experimental results are given to validate the concept proposed.