XOR Arbiter Physical Unclonable Functions Research Articles

QR-PUF: Design and Implementation of a RFID-Based Secure Inpatient Management System Using XOR-Arbiter-PUF and QR-Code

In recent years, Physical Unclonable Functions (PUFs) have played a major role in providing low-cost physical security for IoT devices such as Radio Frequency Identification (RFID) tags. PUFs take advantage of the physical properties of the device to build unique security primitives that can be used by authentication mechanisms. Meanwhile, the security and convenience of QR codes for device authentication on mobile devices has been widely recognized. The point-to-point communication makes it less vulnerable to interception and analysis by adversaries. In this article, we propose a <i>new</i> RFID-based secure inpatient management system for identifying a legitimate patient. Our proposed system uses an XOR Arbiter PUF to generate a secret key-stream and then uses the key-stream to construct a secure QR code for secure identification. Also, since PUFs are vulnerable to machine learning attacks, we propose a modeling attack resilience obfuscation framework to enhance the security of the proposed protocol. Security analysis of the proposed scheme using ProVerif shows that the scheme is effective against a variety of imperative attacks on RFID devices. To show the applicability of the proposed scheme, we also provide a case study of an inpatient management system in hospitals.

MA-GRNN:a high-efficient modeling attack approach utilizing generalized regression neural network for XOR arbiter physical unclonable functions

MA-GRNN:a high-efficient modeling attack approach utilizing generalized regression neural network for XOR arbiter physical unclonable functions

An efficient modeling attack for breaking the security of XOR-Arbiter PUFs by using the fully connected and long-short term memory

Physical Unclonable Functions (PUFs) have been proposed as potential hardware security primitives for various cryptographic applications in recent years. The idea of generating a unique fingerprint for each silicon chip by leveraging variations in the hardware manufacturing has created even more amazing comfortable, and affordable possibilities. On the other hand, some PUFs have shown to be vulnerable to modeling attacks. In this study, we investigate the ability of new Deep Learning (DL)-based technique as potential modeling attacks against more complicated PUF structures. To that end, we utilize the advantage of Long-Short Term Memory (LSTM) for attacking XOR-Arbiter PUFs (XOR-APUFs) for the first time. By combining the proposed LSTM with Fully Connected (FC) neural network, our FC-LSTM obtains 99% modeling accuracy on 7-XOR-APUF and 8-XOR-APUF. Furthermore, our experiments show that, despite the precise mathematical models of PUFs, our proposed modeling attacks effectively overcome the constraints imposed by prior studies in a shorter period of time and with fewer sets of training Challenge-Response Pairs (CRPs).

A New Security Boundary of Component Differentially Challenged XOR Pufs Against Machine Learning Modeling Attacks

Physical Unclonable Functions (PUFs) are promising security primitives for resource-constrained network nodes. The XOR Arbiter PUF (XOR PUF or XPUF) is an intensively studied PUF invented to improve the security of the Arbiter PUF, probably the most lightweight delay-based PUF. Recently, highly powerful machine learning attack methods were discovered and were able to easily break large-sized XPUFs, which were highly secure against earlier machine learning attack methods. Component-differentially-challenged XPUFs (CDC-XPUFs) are XPUFs with different component PUFs receiving different challenges. Studies showed they were much more secure against machine learning attacks than the conventional XPUFs, whose component PUFs receive the same challenge. But these studies were all based on earlier machine learning attack methods, and hence it is not clear if CDC-XPUFs can remain secure under the recently discovered powerful attack methods. In this paper, the two current most powerful two machine learning methods for attacking XPUFs are adapted by fine-tuning the parameters of the two methods for CDCXPUFs. Attack experiments using both simulated PUF data and silicon data generated from PUFs implemented on field-programmable gate array (FPGA) were carried out, and the experimental results showed that some previously secure CDC-XPUFs of certain circuit parameter values are no longer secure under the adapted new attack methods, while many more CDC-XPUFs of other circuit parameter values remain secure. Thus, our experimental attack study has re-defined the boundary between the secure region and the insecure region of the PUF circuit parameter space, providing PUF manufacturers and IoT security application developers with valuable information in choosing PUFs with secure parameter values.

Combining Optimization Objectives: New Modeling Attacks on Strong PUFs

Strong Physical Unclonable Functions (PUFs), as a promising security primitive, are supposed to be a lightweight alternative to classical cryptography for purposes such as device authentication. Most of the proposed candidates, however, have been plagued by modeling attacks breaking their security claims. The Interpose PUF (iPUF), which has been introduced at CHES 2019, was explicitly designed with state-of-the-art modeling attacks in mind and is supposed to be impossible to break by classical and reliability attacks. In this paper, we analyze its vulnerability to reliability attacks. Despite the increased difficulty, these attacks are still feasible, against the original authors’ claim. We explain how adding constraints to the modeling objective streamlines reliability attacks and allows us to model all individual components of an iPUF successfully. In order to build a practical attack, we give several novel contributions. First, we demonstrate that reliability attacks can be performed not only with covariance matrix adaptation evolution strategy (CMA-ES) but also with gradient-based optimization. Second, we show that the switch to gradient-based reliability attacks makes it possible to combine reliability attacks, weight constraints, and Logistic Regression (LR) into a single optimization objective. This framework makes modeling attacks more efficient, as it exploits knowledge of responses and reliability information at the same time. Third, we show that a differentiable model of the iPUF exists and how it can be utilized in a combined reliability attack. We confirm that iPUFs are harder to break than regular XOR Arbiter PUFs. However, we are still able to break (1,10)-iPUF instances, which were originally assumed to be secure, with less than 107 PUF response queries.

Design and Implementation of Enhanced PUF Architecture onFPGA

ABSTRACT Physical un-clonable functions (PUF) play important role in hardware security due to its random response generation. It offers a wide range of security applications, such as key generation, digital rights management, and Field Programmable Gate Array (FPGA) intellectual property (IP) protection. In literature, several PUF structures of both Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) are used to improve the performance parameter, mainly reliability and uniqueness. Because of the large number of challenges and responses pairs (CRPS), Arbiter PUF (APUF) is widely used but suffers from less reliability and uniqueness. The proposed PUF structure is designed to achieve the ideal value of performance metrics and also to reduce the prediction rate. This paper presents a new approach to design Double Feed-Forward XOR Arbiter PUF (DFFX APUF), is a combination of Feed-Forward Arbiter PUF, the output of this combination is XORed to generate the single response. Newly proposed PUF is implemented on Xilinx Virtex-6 FPGA. The reliability and uniqueness are the parameters to evaluate the performance of the DFFX APUF and is compared with the Feed-Froward APUF and Double-APUF. The proposed PUF architecture results, the uniqueness of 5% and reliability of 8% greater than FF-APUF and Double-APUF.

A Fast Deep Learning Method for Security Vulnerability Study of XOR PUFs

Physical unclonable functions (PUF) are emerging as a promising alternative to traditional cryptographic protocols for IoT authentication. XOR Arbiter PUFs (XPUFs), a group of well-studied PUFs, are found to be secure against machine learning (ML) attacks if the XOR gate is large enough, as both the number of CRPs and the computational time required for modeling n-XPUF increases fast with respect to n, the number of component arbiter PUFs. In this paper, we present a neural network-based method that can successfully attack XPUFs with significantly fewer CRPs and shorter learning time when compared with existing ML attack methods. Specifically, the experimental study in this paper shows that our new method can break the 64-bit 9-XPUF within ten minutes of learning time for all of the tested samples and runs, with magnitudes faster than the fastest existing ML attack method, which takes over 1.5 days of parallel computing time on 16 cores.

Splitting the Interpose PUF: A Novel Modeling Attack Strategy

We demonstrate that the Interpose PUF proposed at CHES 2019, an Arbiter PUF-based design for so-called Strong Physical Unclonable Functions (PUFs), can be modeled by novel machine learning strategies up to very substantial sizes and complexities. Our attacks require in the most difficult cases considerable, but realistic, numbers of CRPs, while consuming only moderate computation times, ranging from few seconds to few days. The attacks build on a new divide-and-conquer approach that allows us to model the two building blocks of the Interpose PUF separately. For non-reliability based Machine Learning (ML) attacks, this eventually leads to attack times on (kup, kdown)-Interpose PUFs that are comparable to the ones against max{kup, kdown}-XOR Arbiter PUFs, refuting the original claim that Interpose PUFs could provide security similar to (kdown + kup/2)-XOR Arbiter PUFs (CHES 2019). On the technical side, our novel divide-and-conquer technique might also be useful in analyzing other designs, where XOR Arbiter PUF challenge bits are unknown to the attacker.

Noise-Resilient Neural Network-Based Adversarial Attack Modeling for XOR Physical Unclonable Functions

Authentication plays an essential role in preventing unauthorized access to data and resources on the Internet of Things. Classical security mechanisms fall short of achieving security requirements against many physical attacks due to the resource-constraint nature of IoT devices. Physical Unclonable Functions (PUFs) have been successfully used for lightweight security applications such as devices authentication and secret key generation. PUFs utilize the inevitable variation of integrated circuits during the fabrication process to produce unique responses for individual PUF, hence not reproducible even by the manufacturer itself. However, PUFs are mathematically cloneable by machine learning-based methods. XOR arbiter PUFs are one group of PUFs that can withstand existing attack methods unless exceedingly long training time and large dataset size are applied. In this paper, large-sized XOR PUFs with 64-bit and 128-bit challenges were efficiently and effectively attacked using a carefully engineered neural network-based method. Our fine-tuned neural network-based adversarial models achieve 99% prediction accuracy on noise-free datasets and as low as 96% prediction accuracy on noisy datasets, using up to 55% smaller dataset size compared to existing works known to us. Revealing such vulnerabilities is essential for PUF developers to re-evaluate existing PUF designs, hence avoiding potential risks for IoT devices.

Efficient hybrid side‐channel/machine learning attack on XOR PUFs

A novel hybrid side-channel (SC)/machine learning attack is explored in this Letter to leak the confidential information of non-linear physical unclonable functions (PUFs): XOR arbiter PUFs. In the proposed hybrid attack, SC analyses are utilised to pre-process the input challenge of XOR arbiter PUFs to add high correlation among all the input challenge bits. Subsequently, a convolutional neural network (CNN) attack is performed on the correlated input challenge bits to extract the critical feature among the neighbour data to significantly improve its training/testing accuracy. As shown in the results, after applying the SC analyses to add correlation for the input challenge of an XOR arbiter PUF, the training/testing accuracy of the hybrid attack can be boosted over 0.98. In contrast, the training/testing accuracy of a regular CNN attack on the XOR arbiter PUF is around 0.64 due to the lack of the corresponding correlation.

A Combined Optimization-Theoretic and Side- Channel Approach for Attacking Strong Physical Unclonable Functions

The promise of strong physical unclonable functions (PUF) is to utilize the manufacturing variations of circuit elements to produce an independent and unpredictable response to any input challenge vector. Attacks on PUFs that predict the responses to input challenge vectors offer an interesting research problem. An attacking approach based on the optimization theory and side-channel information is proposed where we estimate the manufacturing variations of the circuit elements and predict the PUF’s responses to challenge vectors whose actual responses are not known. We apply this attacking approach on some popular PUF designs, including the Arbiter PUFs, the Memristor Crossbar PUFs, and the XOR Arbiter PUFs. Simulations show a substantial reduction in attack complexity compared with previously proposed machine-learning (ML)-based attacks: we achieve an average reduction of 66% in attack time compared with the ML approach. Despite some overhead, our approach is also applicable when the PUF responses are noisy.

PUF Modeling Attacks on Simulated and Silicon Data

We discuss numerical modeling attacks on several proposed strong physical unclonable functions (PUFs). Given a set of challenge-response pairs (CRPs) of a Strong PUF, the goal of our attacks is to construct a computer algorithm which behaves indistinguishably from the original PUF on almost all CRPs. If successful, this algorithm can subsequently impersonate the Strong PUF, and can be cloned and distributed arbitrarily. It breaks the security of any applications that rest on the Strong PUF's unpredictability and physical unclonability. Our method is less relevant for other PUF types such as Weak PUFs. The Strong PUFs that we could attack successfully include standard Arbiter PUFs of essentially arbitrary sizes, and XOR Arbiter PUFs, Lightweight Secure PUFs, and Feed-Forward Arbiter PUFs up to certain sizes and complexities. We also investigate the hardness of certain Ring Oscillator PUF architectures in typical Strong PUF applications. Our attacks are based upon various machine learning techniques, including a specially tailored variant of logistic regression and evolution strategies. Our results are mostly obtained on CRPs from numerical simulations that use established digital models of the respective PUFs. For a subset of the considered PUFs-namely standard Arbiter PUFs and XOR Arbiter PUFs-we also lead proofs of concept on silicon data from both FPGAs and ASICs. Over four million silicon CRPs are used in this process. The performance on silicon CRPs is very close to simulated CRPs, confirming a conjecture from earlier versions of this work. Our findings lead to new design requirements for secure electrical Strong PUFs, and will be useful to PUF designers and attackers alike.