Wide Safe Operating Area Research Articles

3-D Segmented Gate Concept: A New IGBT Solution for Reduced Loss and Improved Safe-Operating Area

In this article, the “segmented gate (SG)” concept is proposed and implemented in trench gate to realize both low loss and wide safe-operating area (SOA) for insulated-gate bipolar transistors (IGBTs). The poly gate of the proposed IGBT is split into segments along the trench and each segmented poly gate is surrounded by the poly emitter. This unique 3-D trench architecture is demonstrated under numerical studies to be highly effective in enhancing the short-circuit ruggedness, the turn-off capability, and the latch-up immunity. It enables a 37% reduction in saturation current and a 90% reduction in Miller capacitance. The proposed design also shows an improved trade-off relationship between ON-state voltage and turn-off loss. For the same turn-off loss, the ON-state voltage of the proposed IGBT is reduced by 0.25 V when compared with the conventional carrier-stored trench IGBT.

High Performance Planar Magnetics Based on an Unbalanced-Flux Approach

This paper presents a new design concept to increase the efficiency and the power density of planar magnetics. In contrast to the existing magnetics, which are built using the balanced magnetic flux density design, the proposed design concept generates unbalanced magnetic flux density across the different parts of the magnetic core. The theoretical analysis shows that the core loss of the unbalanced-flux design can be reduced by more than 50% compared to the existing one. The core loss reduction brings several benefits to planar magnetics such as: high power capability, better thermal performance and wider safe operating area (SOA). The proposed design is experimentally evaluated and compared with the balanced-flux design. The experimental results are in good consistency with its theoretical counterparts. The measured core loss are decreased by more than 50% and the power density is increased by more than 250%.

Integrated SiC Anode Switched Thyristor Modules for Smart-Grid Applications

Silicon Carbide Anode Switched Thyristors (ASTs) overcome major limitations of conventional Si and SiC IGBT and GTO Thyristor solutions by providing robust, latch-up free turn-off at high currents, current saturation in the output characteristics, and a wide safe operating area (SOA) through series current controlled device turn-off. In this work, detailed static and switching characteristics of 6.5 kV-class SiC ASTs are reported, which include a low on-state voltage drop of 4 V at 100 A/cm2, slight positive temperature co-efficient of Von, current saturation at > 100 A Cathode currents and fast turn-on and turn-off times of 500 ns while switching 1300 V and 20 A.

고내압 IGBT의 전기적 특성 향상에 관한 연구

Development of new efficient, high voltage switching devices with wide safe operating area and low on-state losses has received considerable attention in recent years. One of those structures with a very effective geometrical design is the trench gate Insulated Gate Bipolar Transistor(IGBT).power IGBT devices are optimized for high-voltage low-power design, decided to aim. Class 1,200 V NPT Planer IGBT, 1,200 V NPT Trench IGBT for class has been studied.

Analysis of a Narrow-Base Lateral IGBT With Double Buried Layer for Junction-Isolated Smart-Power Technologies

An n-type lateral insulated gate bipolar transistor (nLIGBT) with a double buried layer structure is studied. This device is integrated in an existing smart-power junction-isolated technology with a 0.35-mum CMOS core without adding extra mask steps. The double buried layer underneath the active nLIGBT not only renders this a floating device (i.e., it can be used as a high-side switch) but also suppresses the substrate current effectively, and, what is more, it introduces a buried hole diverter. As a consequence, this device has a wide safe operating area and switches off extremely fast with no current tail. The device's static and dynamic behavior is analyzed through 2-D numerical simulations. Finally, the device is compared to the rivaling drain extended MOSFET transistor in this technology.

A New Lateral-IGBT Structure With a Wider Safe Operating Area

A new lateral insulated gate bipolar transistor (LIGBT) for junction-isolated technologies is presented. The nLIGBT is integrated in an existing smart power technology without changing any process layers. The technology has a 0.35-mum CMOS core and is extended with five process layers in order to handle up to 80 V. The drift region of the nLIGBT is completely surrounded by p+ regions, creating a very effective hole bypass or diverter structure. This yields an LIGBT with a very wide safe operating area. The device has a breakdown voltage of 75 V and is able to operate up to 47 V (dc) when the gate is fully open. Furthermore, this device turns off without current tail, resulting in extremely fast turn-off times, which are solely determined by the voltage-rise phase. A true competitor for the quasi-vertical n-type drain extended metal oxide semiconductor (nDEMOS) in this technology is created

Ultrafast floating 75-V lateral IGBT with a buried hole diverter and an effective junction isolation

A low-voltage lateral insulated gate bipolar transistor (IGBT) is proposed for junction-isolated smart power technologies. An effective suppression of the substrate current is obtained through the use of a double buried layer structure. This structure, with the buried layer of p-type (BLP) on top of the buried layer of n-type, also ensures fast switching and a wide safe operating area as the BLP serves as a buried hole diverter in the on state and during turnoff. The floating capability of the device is also provided by the double buried layer. This lateral IGBT (LIGBT) is made in a standard smart power technology without adding extra masks. Due to the low power losses in the on state and during switching, this n-type LIGBT is competitive with n-type DMOS devices.

Influence of the collector resistance on the performance of accumulation channel driven bipolar transistor

In this paper, the physical mechanism limiting the maximum controllable current density ( J mcc) and safe operating area (SOA) of the accumulation channel driven bipolar transistor (ACBT) is identified and analyzed for the first time. According to our analysis, the hole current flowing into the P + collector at the shallow trench creates a bias opposing the built-in potential of the P + collector/N-drift junction due to a finite resistance associated with the contact to the diffused P + collector region. This lowers the potential barrier established in the narrow mesa region (in between the self-aligned trenches) by the built-in potential of the P + collector/N-drift junction and the control gate potential and promotes electron injection from the N + emitter into the N-drift region over the potential barrier. At the onset of electron injection over the potential barrier, gate control over the base drive of the vertical wide base PNP transistor in the ACBT is lost. This hypothesis has been verified through numerical simulations and confirmed by experimental measurements which indicated an increase of over 300% in J mcc due to a reduction in the contact resistance to the P + collector region after a post metallization anneal of the fabricated ACBT designs. Based upon these observations, a new ACBT structure with a Schottky collector junction is proposed. It is demonstrated that the proposed ACBT structure has a higher J mcc and wider SOA in comparison to the ACBT structure with P + collector region.

Insulated gate transistor physics: Modeling and optimization of the on-state characteristics

The Insulated Gate Transistor (IGT) is modeled as a bi-polar junction transistor (BJT) driven by a MOSFET. The bipolar nature of the device is examined by studying the effects of carrier lifetime on electrical performance. This model also predicts the effects of the gate-oxide thickness, channel length, and cell spacing on the IGT forward <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I-V</tex> characteristics for a 100-1200 V range in blocking voltage. The relative significance of the MOS/BJT components of the device has been explored. This is particularly important when optimizing designs over a wide range of voltage ratings. Careful attention to this has led to greater than a three times improvement in high-temperature dynamic latching current. This is the key to obtaining a wide safe operating area for the IGT. For the first time, an accurate and straightforward model of IGT has been developed. The model predictions are within 15 percent of the experimental data.