W-matrix Method Research Articles

Fast-forward/fast-backward substitutions on vector computers

This paper deals with approaches for sparse matrix substitutions using vector processing. Many publications have used the W-matrix method to solve the forward/backward substitutions on a vector computer. A different approach has been presented using dependency-based substitution algorithm (DBSA). In this paper the focus is on new algorithms able to explore the sparsity of the vectors. The efficiency is tested using linear systems from power systems with 118, 320, 725 and 1729 buses. The tests were performed on a CRAY Y MP2E/232. The speedups for a fast-forward/fast-backward using a 1729-bus system are near 19 and 14 for real and complex arithmetic operations, respectively. When forward/backward is employed the speedups are about 8 and 6 to perform the same simulations.

A new successive relaxation scheme for the W-matrix solution method on a shared memory parallel computer

The W-matrix method has the potential to be efficient for parallel computing as a substitute for the precedence stringent substitution schemes, which are being commonly used on sequential computers for the solution of sparse linear matrix equations, with the support of appropriate reordering and partitioning algorithms. In this paper, the factors which may affect the performance of the W-matrix method are examined first. A bus reordering and partitioning scheme is then proposed which is aimed at reducing the fill-ins in both the triangular matrices L and U and the W-matrices and adjusting the patterns of the W-matrices for better parallel efficiency. Tests conducted on a shared memory parallel computer proved the effectiveness of the proposed algorithm for various systems. Test results are presented and discussed,.

Dependency-based algorithms for vector processing of sparse matrix forward/backward substitutions [power system stability analysis

Recent efforts to improve the execution speed of steady-state and transient analysis of power systems are focused on exploiting parallel and vector processing. In this paper, two algorithms for forward/backward substitutions and their implementation on vector computers are considered. A dependency-based substitution algorithm (DBSA) is proposed and compared with the well known W-matrix method. According to DBSA, the nonzero entries of the factor matrices are rearranged in groups of elements (slices) leading to independent operations. In the implementation of the W-matrix method, the nonzero elements of the inverse factors are grouped in sets (pseudocolumns) to overcome the problem of dependency between addition operations. Test cases, performed on a CRAY X-MP2/216 and a CRAY Y-MP8/464 vector computer, are taken from real-life power system problems and consist in the solution of linear systems with up to 12000 equations. The maximum speed-ups achieved (with respect to a code based on standard sparsity programming) are near to 7 for complex arithmetic and to 11 for real arithmetic.

Parallel solution of sparse algebraic equations

Two methods that have been studied for solving large, sparse sets of algebraic equations connected with power system problems, the multiple factoring method and the W-matrix method, are shown to be two independent methods of explaining equivalent computational procedures. The forward and backward substitution part of these methods are investigated using parallel processing techniques on commercially available computers. The results are presented from testing the proposed methods on two local memory machines, the Intel iPSC/1 and iPSC/860 hypercubes, and a shared memory machine, the Sequent SymmetryS81. With the iPSC/1, which is characterised by its slow communication rate and high communication overhead for a short message, the best speedup obtained is less than 2.5, and that was with only 8 of the 16 available processors in use. The iPSC/860, a more advanced model of the iPSC family, is even worse as far as these parallel methods are concerned. Much better results were obtained on the Sequent Symmetry where a speedup of 7.48 was obtained with 16 processors.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Efficient storage scheme and algorithms for W-matrix vector multiplication on vector computers

The W-matrix method has been proposed in many literatures to exploit parallelism in the solution of many power system problems. This paper presents a storage scheme for storing the sparse W-matrix in solving linear equations on vector computers. Based on the proposed storage scheme, several efficient algorithms have been developed to perform the W-matrix vector multiplication for finding linear system solutions. In this paper, attention is given to the issues of vector length, data movement between vector registers and memory, and the vector stride. The proposed storage scheme and algorithms are tested on Convex 3840 and Alliant FX/80 vector machines. It is shown that a speedup of two to four times is obtainable as compared to traditional scalar operation. The proposed storage scheme and algorithms can be applied to power system problems that require repeat solutions of linear system, such as load flow, contingency analysis, fast decoupled state estimation and short circuit calculations. >

Relaxation-Newton methods for transient stability analysis on a vector/parallel computer

In this paper, the implementation of transient stability analysis programs on a vector/parallel computer is considered. The windowing technique is adopted. The parallelism-in-time is exploited by using the Gauss-Jacobi or the Gauss-Seidel methods to relax the dependency between time steps within a time window; the Newton method is employed to solve the discretized equations corresponding to each time step exploiting the parallelism-in-space. The computation of the bus voltage and state variables pertaining to different time steps is carried out in parallel by the processors available. A reordering of the operations relative to the synchronous machine equations is introduced to obtain an efficient use of the vector hardware of the computer. The W-matrix method is employed to solve the network equations. Test case simulations are performed for the IEEE 118 bus system and two US networks with 662 and 904 buses using a 4-processor CRAY Y-MP8/464 computer. The proposed vector/parallel programs achieve substantial speed-ups over a scalar reference program based on the Very Dishonest Newton method. The synergy between vector and parallel processing allows speed-ups in excess of 22 to be attained for the US 904 bus network; run times are always shorter than the simulation interval. Best results are obtained by implementing the proposed travelling window approach. Thanks to a suitable task partitioning, the apparently sequential Gauss-Seidel approach is demonstrated to be an effective alternative to the Gauss-Jacobi relaxation scheme. >

A W-matrix based fast decoupled load flow for contingency studies on vector computers

The authors deal with an application of the inverse factors method (W-matrix method) to a fast decoupled load flow procedure for steady-state contingency analysis. The W-matrix method, originally developed for the solution of sparse sets of linear equations on multiple instruction/multiple data (MIMD) computers, can also be made effective for vector computers. The recurrence problem is overcome by reordering the addition operations required in a forward and backward solution. Matrix partitioning is employed to find the best tradeoff between the number of fill-ins added to the W matrix and the increased efficiency of vector operations achieved through a reduced number of partitions. The effect of different bus ordering algorithms on the partition number is also considered. Operation reordering is employed to make the bus power computation phase very fast in comparison to traditional bus-wise calculation. Tests were performed on the IEEE 118 bus system, some different configurations of the Italian EHV system and a European equivalent network with up to about 700 buses using a 4-CPU CRAY Y-MP8/432 and a 4-CPU Alliant FX/80 computer.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>