Volume Of Passive Components Research Articles

A General Analysis of Resonant Switched-Capacitor Converters Using Peak Energy Storage and Switch Stress Including Ripple

This work presents a general analytical framework enabling large-signal characterization of resonant switched-capacitor (ReSC) power converters that accounts for passive component voltage and current ripple, for operation at and above resonance. From this, appropriate phase durations for minimized rms currents are derived, in addition to expressions for total passive component volume using an intuitive peak energy method. An example hardware prototype validates both the derived waveforms and timings—as well as total passive volume—through three comparable hardware configurations, one of which minimizes passive component volume. In addition, the proposed technique formulates analytical expressions for both rms currents and peak blocking voltages, facilitating refined loss estimation and component selection. Subsequent calculation of the large-signal Volt–Amp (VA) switch stress metric allows a more accurately quantified trade-off between active and passive components compared to prior work, which has not fully accounted for ripple. Four common ReSC topologies are exemplified throughout, with topology specific parameters documented for reference.

Multi-Criteria Ranking of Z-Source Inverter Topologies for a Three-Wheel Fuel Cell Hybrid Electric Vehicle

Replacing the regular two-stage inverters with a Z-source inverter (ZSI), based on single conversion, has come under attention in fuel cell (FC) hybrid electric vehicles (HEVs). This substitution is to decrease the circuit complexity, cost, and required space. However, fulfilling these goals highly depends on the selection of a suitable topology. This paper performs a multi-criteria ranking to deeply analyze the impact of different ZSI topologies on the performance of a recreational FC-HEV, composed of FC stack and lithium-ion capacitor bank. First, the dual-energy sources are embedded into the Z-source network (ZSN). Subsequently, the Preference Ranking Organization METHod for Enrichment Evaluation (PROMETHEE) is utilized to rank different possible ZSI topologies based on four scenarios (standard, compactness, input current ripple, and compactness versus input current ripple). This analysis indicates that each scenario can have a suitable topology with respect to its requirements. Finally, the two highest-ranked ZSI topologies according to standard scenario are implemented by signal hardware-in-the-loop (HIL) to validate the effectiveness of the performed analysis. The results indicate that the use of the ZSI topologies lead to higher average efficiencies (1.98% and 4.07%), and smaller size and volume of passive components, compared to a conventional two-stage inverter.

A Selective Common Mode Noise Mitigation Method Using Phase-Shifted Modulation for Four-Switch Buck–Boost DC/DC Converter

Wide bandgap (WBG) power devices can work at higher switching frequencies compared to silicon competitors. It helps reduce the volume of passive components but brings more serious electromagnetic interference (EMI) noise issue. The increased noise filtering requirements may restrict the power density improvement. This study discusses the conducted EMI issue and noise filtering in the four-switch buck-boost DC/DC converter (FSBB). The differential mode (DM) and common mode (CM) noise model embedded with noise sources features are derived and analyzed. It is found that modifying the spectral distribution of the CM noise is a challenge when the duty cycles are fixed by voltage gain. Inspired by the CM model, a phase-shifted modulation method is proposed to achieve selective CM noise mitigation. The recommended operating range and the implementation process are presented. The theoretical modeling and the proposed method are verified through a FSBB converter with 48V input and 100kHz switching frequency. And experimental results validate that the proposed method can achieve 30% volume reduction of the CM filter.

A Novel Integrated Matrix Magnetics for Isolated Single-Stage DC–DC Converter

With the development of data center, promotion for efficiency and power density of the voltage regulator module (VRM) is paid considerable attention. Isolated VRM is suitable for the high-conversion-ratio dc–dc application. However, isolated VRM has many magnetic components, which take up a large proportion of the total volume. In this article, a novel integrated matrix magnetics structure is proposed, which integrates two elemental transformers and four output inductors into a single core. By integrating several discrete magnetic components, the volume of passive components, and high-current interconnections are reduced, leading to high power density and high efficiency. The integrated matrix magnetics is employed in an isolated single-stage converter, which can provide high output current. In addition, primary switches can achieve zero-voltage-switching (ZVS), and synchronous rectifiers of secondary side can achieve ZVS and zero-current-switching, so efficiency can be further improved. Besides, equivalent output inductance, voltage conversion ratio and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">A</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P</sub> calculation are derived to design the integrated matrix magnetics. Finally, a 48 V/1.8 V 144 W prototype of the isolated single-stage converter with integrated matrix magnetics is made and tested to verify the analysis.

Modeling and Comparison of Passive Component Volume of Hybrid Resonant Switched-Capacitor Converters

Hybrid and resonant switched-capacitor (SC) convertersenable efficient utilization of both active and passive components, and have the potential to achieve higher efficiency and higher power density than conventional SC and magnetic-based converters. One or more added inductors offer an additional degree of freedom in the design space. It is of great interest to understand the tradeoffsbetween capacitor and inductor size and volume allocation. In this article, we analyze the reactive energy processed by the passive components and use it to calculate the total passive component volume. It is shown that the total passive component volume of resonant SC (ReSC) converters can be expressed as a function of flying capacitor voltage ripple, and the optimized capacitor voltage ripple that minimizes the total volume is dependent on topology specific parameters and the relative energy density ratio between capacitors and inductors. Moreover, we also demonstrate through theoretical analysis and experimentation that ReSC converters use significantly less passive component volume than conventional SC and buck converters for the same amount of power converted. Next, to compare different ReSC topologies, a normalized passive volume parameter is proposed for simple and fair comparison. This can be used along with a normalized switch stress parameter (based on switch VA ratings) to create a framework to showcase the relative performance of different topologies. This framework can be used to visualize and compare the passive and active component utilization among different topologies. Additionally, the proposed reactive power analysis is extended to hybrid converters with regulation capability.

Comparative evaluation of different DC-AC converter topologies for cryogenic applications utilizing superconducting materials

Modern transportation applications including electric vehicles (EVs), more electric aircraft (MEA) and electric comprise of different power conversion systems. Reduced weight and improved semiconductor efficiency are the major challenges towards their improved overall performance. To overcome them, cryogenic operation of power electronics converters (CPEC), electric motors, cables, and energy storage components has been under research and evaluation. CPEC are being investigated to drive superconducting machines (SCM) because of their lightweight structure and improved efficiency. CPEC can offer improved switching performance, reduced conduction losses and therefore increased efficiency; because of reduced on-resistance and increased carrier mobility of active devices. This article will discuss how can the benefits of lower operating temperature (< 93 K) be utilized in determining the most suitable DC-AC converter configuration. The paper compares three basic converter topologies: (a) two level voltage source inverter (2L-VSI), (b) three level t-type neutral point clamped inverter (3L-TNPC) and (c) two-level current source inverter (2L-CSI). Analysis is provided based on volume of passive components, electromagnetic interference (EMI) spectra and number of active devices, where all components considered are compatible with low temperatures. It can be observed that utilization of cryogenic temperature affects the volume of passive components, and therefore the overall selection of converter.

A Carrier-Based Two-Phase-Clamped DPWM Strategy With Zero-Sequence Voltage Injection for Three-Phase Quasi-Two-Stage Buck-Type Rectifiers

A three-phase buck-type rectifier features a step-down ac–dc conversion function, which is considered as a prominent solution for electric vehicle chargers and telecommunication systems integrated to the grid above 380 V line to line. However, traditional solutions for those applications employ cascaded architectures with an ac–dc boost-type stage and a dc–dc buck-type stage, which may suffer from high switching losses and large dc-link capacitor volume. To relieve this issue, a straightforward carrier-based two-phase-clamped discontinuous pulsewidth modulation (DPWM) strategy with generalized zero-sequence voltage injection is proposed in this article for the commonly employed cascaded circuit. This method can stop the switching actions in the front-end stage during two-third of the grid period, which can yield to the best switching loss reduction. The operations of the front- and back-end converter stages become highly coupled to each other, which reduces the size requirement of the capacitor in the dc link. Therefore, the equivalent circuit behaves as a quasi-two-stage buck-type rectifier allowing an enhancement of the system power density by improving power conversion efficiency and by reducing the volume of passive components and heat sink. The proposed carrier-based two-phase-clamped DPWM strategy is described, analyzed, validated, and compared with different pulsewidth modulation methods on PLECS-based simulation and a 5-kW prototype.

A High Step-Up Interleaved Current-Fed Resonant Converter for High-Voltage Applications

A current-fed LLC resonant converter is proposed for high-voltage and high-power applications. Here, a two-phase interleaved structure is used in the input stage under the continuous conduction mode (CCM) to effectively reduce the input current and output voltage ripple values and the input filter and the output capacitors volumes. Due to the expandable structure and high voltage gain, the proposed configuration is suitable for high voltage applications since low voltage stresses are applied across its components. In fact, voltage stresses across the power semiconductors, i.e., MOSFETs and output diodes, along with the output capacitors, are almost one-third of the output voltage in the implemented three-stage configuration of the proposed converter. Here, the switching frequency is chosen close to, but less than, the converter series resonant frequency to reduce its different components’ current stresses and perform soft-switching operation for all power devices under wide input voltage and output power variations. Therefore, conduction and switching losses, and EMI noises are effectively reduced. Consequently, efficiency is improved and high-frequency operation is possible, which reduces the volume of passive components to achieve high-power density. The given topology is thoroughly analyzed mathematically. Also, a 1 kW prototype converter has been implemented to validate the given simulations and analyses. Here, wide input voltage (100 V-200 V) and output power (100 W-1000 W) variations are applied, and an asymmetric pulse width modulation (APWM) technique is used at 143 kHz switching frequency to regulate the output voltage at 1 kV. The obtained maximum efficiency value is 95.3%.

A High Power Density Multilevel Bipolar Active Single-Phase Buffer With Full Capacitor Energy Utilization and Controlled Power Harmonics

Active power decoupling in single-phase conversion systems reduces the required capacitance for twice-line frequency power ripple buffering by operating the energy buffering capacitors with high energy utilization ratios. The bipolar active buffer is the buffer topology that can achieve 100% energy utilization ratio. Yet, the conventional two-level full-bridge designs suffer from high switching and conduction loss and large filter inductor size due to the direct connection of the buffer across the high voltage dc-bus. Moreover, the high voltage swings across the buffer capacitor impose challenges for the control to regulate harmonics in the system. This article improves the power density and the efficiency of the bipolar active buffer through a buffer architecture incorporating the flying capacitor multilevel topology. Moreover, control techniques to regulate harmonics in the buffer are proposed to maintain low ripple in the dc-side current. The use of two common types of capacitors, the metal film capacitor and the X6S multilayer ceramic capacitor (MLCC) as buffer capacitors, is addressed with different harmonic control schemes. With MLCCs, we have also achieved a total passive component volume that is almost three times smaller than state-of-the-art solutions. The proposed approach is validated using a compact hardware for a 2-kW, 400-V dc-bus, 60-Hz single-phase inverter application.

Current-Source Inverter Integrated Motor Drives Using Dual-Gate Four-Quadrant Wide-Bandgap Power Switches

Four-quadrant (FQ) switches that have both bidirectional current and reverse-voltage blocking (RVB) capabilities are appealing candidates for use in current-source inverters (CSI) to significantly reduce the switch conduction losses. However, the FQ characteristics of these switches can create problems during switching events by causing transient overcurrent pulses that damage the inverter. Commutation methods for FQ switches in CSI topologies that address these challenges are presented in this article. Several key aspects of the performance and implementation of these commutation methods are explored for a high-power density 3 kW integrated motor drive incorporating both a current-source active rectifier and inverter stage that has been developed using these FQ switch methods. Experimental results demonstrate the benefits of implementing these commutation methods in CSIs that use FQ switches. The benefits include substantial efficiency improvement compared to the conventional CSI implemented with series power diodes as well as reduced mass and volume of passive components due to the high switching frequency (100 kHz).

DC-DC converter with 50 kHz-500 kHz range of switching frequency for passive component volume reduction

This paper presents the relationship of switching frequency towards passive components volume of DC-DC boost converter. Principally, the inductor current ripple and capacitor voltage ripple must be considered in order to design the inductor and capacitor, respectively. By increasing the switching frequency, smaller size and volume of passive component can be designed. As the consequences, the switching loss increases during switching transition at turn-ON and turn-OFF conditions. This paper used soft-switching technique to reduce the switching loss at turn-ON condition. The soft-switching technique is realized by adding resonant circuit in DC-DC boost converter. The effectiveness of resonant circuit will be analysed, thus, the efficiency of the converter can be improved. The range of switching frequency considered in the experimental are 50 kHz to 500 kHz. A 100 W prototype has been developed and tested in order to verify the principle. The switching loss experimentally confirm reduced by implementing soft-switching technique with efficiency converter improved from 96.36% to 97.12% when 500 kHz of switching frequency is considered. The passive components volume reduction is achieved when high switching frequency is used where the total volume of passive component when 50 kHz and 500 kHz are 0.083 dm3 and 0.010 dm3, respectively.

Nonisolated PWM Three-Port Converter Realizing Reduced Circuit Volume for Satellite Electrical Power Systems

Three-port converters (TPCs) combining two dc–dc converters into a single unit is a promising solution that can simplify and miniaturize satellite electrical power systems. Conventional nonisolated TPCs, however, face a variety of challenges, such as the necessity of a transformer, low effective duty cycle operation, and unshared ground issues. This article proposes a novel nonisolated TPC integrating a unidirectional and bidirectional pulsewidth modulation converters. The two converters can be integrated into a single unit with reducing total switch count without employing a transformer, thus achieving the simplified circuit. In addition, thanks to the capacitor added in series with switches, not only the voltage stress of semiconductor devices is reduced, but also miniaturized inductor design is feasible. The quantitative analysis revealed that the volume of passive components in the proposed TPC could be reduced by approximately 19% compared with a conventional nonisolated TPC. A 240-W prototype was built for the experimental verification, and the results agreed well with those of the analysis, demonstrating its efficacy.

Review of very high frequency power converters and related technologies

With the increasing demand for volume reduction and efficiency improvement, very high frequency (VHF) power converters (30–300 MHz) have attracted great interest. Under such high operating frequency conditions, the value and volume of passive components can be greatly reduced, and the power density can be improved. However, many concerns and challenges accompany the increasing operating frequency, such as high switching loss, high magnetic components loss and high driving circuit loss. Including various topologies of the VHF converter, this study reviews the state-of-the-art technology involved in the VHF power converter, also encompassing the inverter stage and matching network stage. Secondly, different magnetic components and semiconductor devices were evaluated under the VHF operating condition. Thirdly, the high-efficiency driving methods, such as the resonant driving method and self-resonant driving method, were demonstrated. A guideline for converter design and system optimisation of the VHF converter and related technologies, including all components and systems, is illustrated in this study. Finally, the future research hot spots and challenges have been pointed out as guidance for further advanced VHF power conversion techniques.

Analysis and Suppression Strategy for the Double-Line Frequency Pulsation in Single-Phase Quasi-Z-Source Converter

Devices and the passive components in the single-phase impedance source network converter are sensitive to the double-line-frequency (DLF) pulsation. Previous research works have studied the power decoupling and the DLF equivalent model for the power pulsation suppression method. This paper explored the DLF transfer routes in the impedance source network. A comprehensive stress derivation of the passive components and switching devices are obtained for the suppression method enhancement and optimization. For the DLF passive suppression method, the explanation for the passive component volume issue is provided from the stress aspect. The component value solution space and corresponding design guidance are presented. For the DLF active suppression method (ASM), a buck-type dc-side ASM suppression method is employed and its optimization is demonstrated with the assistant circuit stress analysis. The total capacitor and inductor values get reduced by 77% and 25%, respectively. The corresponding pulsewidth modulation method implementation and the common-mode leakage current demonstration are also presented. The effectiveness of the theoretical analysis and optimization methods is verified by simulations and experiments.

A Proposed Fast Charging and High-Power System for Wireless Railway Trains Adopting the Input Voltage Sharing Topology and the Balancing Control Scheme

In this article, we deal with the onboard fast energy conversion system (FECS) that is installed in a wireless railway train (WRT), which receives electrical energy not from the wayside device but from the onboard device when traveling between stations, after getting such energy stored by fast charging during its stopping time at a station. The adopted input-series and output-independent architecture and the interleaving topology can reduce the size and weight of onboard FECS for 1500 V, which is double the operating voltage of the existing 750 V operating voltage. This allows 1200 V class insulated-gate bipolar transistor applications to increase switching frequency and reduce passive component volume. In addition, in order to secure system stability, which is important in any transportation system, a WRT must operate on the basis of simple control. Through a simple and efficient balance control based on a variable current limiter, the input voltage unbalance caused by the input voltage sharing is resolved. Also, it can control charging and discharging based on the energy moving characteristic of the train operation pattern and connection with a high-power energy storage pack. The performance of the onboard FECS at 1500 V with the proposed method is experimentally verified on a 600 kW prototype system.

A Family of Step-Up Series–Parallel Dual Resonant Switched-Capacitor Converters With Wide Regulation Range

In this paper, a family of new step-up series–parallel dual resonant switched-capacitor converters (SP-DRSCs) is proposed to extend the conversion ratio for high step-up applications. The converters feature a wide gain range, continuously adjustable, and enhanced light-load voltage regulation. All flying capacitors operate in resonance, eliminating high transient current spikes and charge sharing losses. Thus, zero-current-switching (ZCS) turn- on for all transistors and ZCS turn- off for all diodes are achieved. A comprehensive analysis of the operation principle, voltage-gain curves, stable regulation range, and voltage and current stress is given. An analytical method to quantify the passive component volume for the group of step-up dual resonance switched-capacitor converters is presented. Further design considerations to optimize the passive component volume of the proposed SP-DRSC and the effect of bulky bypass capacitors on the volume are discussed.

Comprehensive comparison and analysis of non‐inverting buck boost and conventional buck boost converters

The non-inverting buck boost (NIBB) converter has attracted significant attention in recent years, as it shares ground between input and output, and the voltage stress of switches is lower. In order to investigate the differences between NIBB and conventional buck boost converters, a comprehensive comparison and analysis of these two converters were conducted in terms of their operation principles, which includes multi-mode control strategy and dual-edge modulation here, and also the characteristics of switches and passive components in the two converters were analysed. The results show that NIBB is better than conventional buck boost circuit in these aspects of electrical stress, power loss, cost, passive component volume, and so on. Two prototypes for the two converters with 10 kW/20 kHz were designed and simulated, respectively, for verifying the results. Analytical and simulated results confirmed the conclusions.

Analysis and Design of a 1-MHz Single-Switch DC–DC Converter With Small Winding Resistance

A 1-MHz single-switch dc–dc converter, which has a good step-up ability, is proposed in this paper. Under a high-frequency condition, the volume of passive components can be greatly reduced, and the power density can be significantly improved. The operating principles of the proposed converter are analyzed, and its system performance, including the parasitic components, is mathematically derived. To improve the boost ability and efficiency of the converter, planar magnetics with a nonuniform width winding structure are adopted in the converter, which can achieve smaller parasitic resistance. A prototype is built to verify the feasibility of the proposed high-frequency converter.

Single‐phase high‐voltage gain switched LC Z‐source inverters

Recently, switched-inductor Z-source inverters (SL-ZSIs) have been reported to achieve high-voltage gain and good power inversion operation at low shoot-through duty ratio D as compared to conventional ZSI. As the SL-ZSIs have high passive component count, weight, volume and losses of the system increases that lead to reduction in efficiency. To address the issues of conventional ZSI and SL-ZSIs, two single-phase switched LC (SLC)-ZSIs (Type 1 SLC-ZSI and Type 2 SLC-ZSI) are proposed in this study to achieve high-voltage gains at low values of D with lower passive component count as compared to SL-ZSIs. At low values of D , modulation index M approaches to higher values which results into improved AC output at reduced harmonic distortion. Due to low passive component count in the proposed inverters, weight, volume and losses decreases resulting into increase in efficiency. The proposed inverters can be used in various DC-AC and DC-DC power conversions in renewable energy applications due to their high-voltage gain, better immunity to EMI noise and higher reliability. The detailed steady-state analysis of the two proposed SLC-ZSIs is given in this study. Scaled down experimentation has been carried out to verify the performance of the proposed inverters.

An Analytical Method to Evaluate and Design Hybrid Switched-Capacitor and Multilevel Converters

This paper investigates the use of multilevel conversion in dc–dc applications that require a large voltage conversion ratio. A quantitative method that can serve as a guide to compare and design multilevel topologies for large conversion ratio applications is presented. The proposed method keeps the conduction loss and switching loss constant across the different converters and employs the passive component volume as the single performance metric. As examples, flying capacitor multilevel converters and hybrid switched-capacitor (SC) converters are compared to conventional two-level buck converters, and are shown analytically to have significantly reduced passive component size. Three converter prototypes are implemented, based on the presented methodology to experimentally validate the method as well as demonstrate the advantages of multilevel and hybrid SC converters.