Voltage-to-frequency Converter Research Articles

Drift Resilient Frequency-Based Sensor Interface Architectures with Adaptive Clock Frequency

Maintaining the accuracy of a sensor system across various operating conditions has always been a challenge, especially for those operating in harsh surroundings such as a radiation environment. Concerning frequency-based sensor interfaces, supply voltage drifts and gain shift of the voltage-to-frequency converter (VFC) are critical design issues. These manifest as gain, offset, and linearity errors at the system level and therefore require continuous correction mechanisms. In this paper, dynamic gain and offset error-compensated open-loop frequency-based sensor interface architectures with adaptive clock frequency are proposed, which result in a ratiometric digital output. To address the mismatch issue, two architectures, one with periodic swapping of the VFCs’ inputs and outputs, and the other with the use of a single analog-to-digital converter (ADC) as an analog front end, are developed. The concepts were demonstrated with implementations on a Zynq board (ZYBO). The results of the first architecture showed that for a 25% gain mismatch between the VFCs, the output gain error was reduced from around 7.4% to 0.79% and the offset error was reduced from around 11.8% to 0.01%. Additionally, for the second architecture, a maximum of 0.11% gain error and 0.1% offset error were recorded for an emulated ±25% supply drift.

An Integrator and Schmitt Trigger Based Voltage-to-Frequency Converter Using Unipolar Metal-Oxide Thin Film Transistors

This article proposes a voltage-to-frequency converter (VFC) design using unipolar metal-oxide thin film transistor (TFT) technology. The proposed VFC has an integrator and Schmitt trigger based structure. This structure has the advantages of constant power consumption, full-swing output, and low circuit complexity compared to the early designs. To verify the proposed design, SmartSpice simulation based on a Rensselaer Polytechnic Institute (RPI) model whose parameters are turned to fix the measured characteristics of our indium tin oxide(ITO-) stabilized ZnO TFTs is carried out. The ITO-stabilized ZnO TFT has a single-gate staggered structure. Its typical field-effect mobility, threshold voltage, on/off current ratio, and subthreshold-slope are 14.5 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs, 0.5 V, 1.2×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> , and 77 mV/decade, respectively. Simulation results show that the proposed VFC has maximum linearity error less than 1.8%, tuning sensitivity about 1 kHz/V, and power consumption less than 130 μW even under device variations. These performances are competitive compared to the state-of-the-arts. When configured to an analog-to-digital converter (ADC), 6 bit resolution and 14 S/s sampling rate can be realized. These results indicate that the VFC can find potential applications in flexible large-area low-voltage sensor interfaces for quasi-static signals.

Design of a Linear Voltage to Frequency Converter for Digital Audio Applications

Voltage to frequency converters are used in various types of analog to digital converters in suitable digital audio applications. One of the applications is the Audio Interface which has been considered. The Voltage to frequency converter (VFC) thus plays a major role in the analog to digital conversion. This paper proposes a low power VFC designed in 0.18 μm technology which in turn is used to design a low cost and a high-resolution analog to digital converter (ADC). The analog signal is given to the V-F converter and the VFC output is given to the frequency counter using a suitable link. This counter gives the digital output. The design is implemented in PSoC and the performance is analysed with the previous technologies. Parameters such as sensitivity, output frequency and power consumption are analysed. This V-F converter and ADC are used in the digital audio interface which is used for audio applications. With the proposed VFC and ADC, the interface produced a good SNR compared to the conventional audio interfaces.

Temperature-to-Frequency Converter With 1.47% Error Using Thermistor Linearity Calibration

Temperature variation is well known to be very critical for estimating other parameters, e.g., the state of charge and the state of health of batteries. A high-accuracy temperature to frequency converter with thermistor linear calibration based on the thermistor linearization circuit is designed and analyzed in this investigation, where a voltage-to-frequency converter (VFC) is added instead of an analog-to-digital converter. The proposed design converts the voltage into a digital signal (frequency output) to reduce design complexity as well as the cost of chip area. A detailed analysis, including the method using the thermistor linearization calibration circuit and VFC, is reported in this paper. The measurement results in a thermal chamber establish that the output frequency is 1.62 to 2.27 MHz, the maximum linearity error is ±0.5%, and the temperature error is ≤1.47% in the temperature range of 268.15 to 313.15 K.

A new design methodology for voltage-to-frequency converters (VFCs) circuits suitable for time-based analog-to-digital converters (T-ADCs)

Analog-to-digital converter (ADC) is one of the crucial blocks for the software defined radio applications that require higher resolution, and less power consumption; accordingly, time-based analog to digital converters (T-ADC) are introduced to make use of the technology scaling, achieving low-power consumption and high-speed compared to traditional ADCs. T-ADC is composed of two parts voltage-to-time converter and time-to-digital converter; the proposed design is based on converting the voltage to frequency instead of time using the voltage-to-frequency converter. The new methodology increases the circuit sensitivity, and reduces the linearity error. Furthermore, the new methodology enhances the maximum input frequency, effective number of bits (ENOB), and signal to noise and distortion ratio (SNDR). In the proposed study, the maximum input frequency increases up to 74.8 MHz with linearity error of 3%, sensitivity of 43.24 GHz/V, ENOB of 2.79 bits and SNDR of 18.54 dB using TSMC 65 nm CMOS technology with a supply voltage of 1.2 V.

A simple voltage-to-frequency converter with modulated duty cycle

A simple voltage-to-frequency converter (VFC) with modulated duty cycles is proposed. The proposed VFC is composed of an operational amplifier, a voltage-to-current circuit, a charge and discharge circuit, a comparator, and a Schmitt trigger. The 50% duty cycle signal is always obtained at the output of the Schmitt trigger and multiple duty cycles can be obtained at the output of the comparator by simply adjusting an external voltage level. Due to its simplicity, the proposed VFC circuit can be easily combined with other circuitry to extend its practical application. The errors caused by the circuit non-idealities are investigated to quantify the trade-offs between performance and cost. The proposed VFC, which features modulated duty cycles, is realized in a standard 0.18-μm 1P6M complementary metal-oxide-semiconductor (CMOS) technology, and an active area of 210 μm × 190 μm is occupied. Experimental results show that the proposed converter is useful for output frequency ranges from 315 kHz to 2.53 MHz with an input voltage range of 0.2–1.6 V and a power consumption of 0.8 mW.

Ratiometric Voltage-to-Frequency Converter for Long-Life Autonomous Portable Equipment

This paper presents a high performance 1.2 V–0.18 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$\mu{\rm m}$</tex></formula> CMOS voltage-to-frequency converter (VFC) that can be used either in single or differential mode to digitize sensor readout signals in wireless sensor network applications. The proposed VFC works over the entire input range with output frequencies ranging between 0.1 and 1.0MHz, which allows the sensor node embedded microcontroller performing optimally the final digitalization Its operation is ratiometric, adding value to this device when used in battery operated systems. High linearity is achieved (0.015% linearity error) with low power consumption (80 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu{\rm W}$</tex></formula> ) over a temperature range of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${-}{40}$</tex></formula> to <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${+}{\rm 120}^{\circ}{\rm C}$</tex></formula> .

CMOS Voltage-to-Frequency Converter With Temperature Drift Compensation

This paper presents a new complementary metal-oxide-semiconductor (CMOS) differential voltage-to-frequency converter (VFC) suitable for sensor signal conditioning. Designed in a low-cost 0.18- μm CMOS process, the proposed VFC consumes less than 0.4 mW at a 1.8-V supply. For a differential input range of 0-1.2 V, output frequency varies from 0.1 to 1.1 MHz with a linearity error of less than 0.4%. A new temperature compensation technique keeps the gain error below 2.4% over the whole frequency span for a range of -20°C- +120°C.

A temperature-compensated differential VFC in 1.8 V–0.18 μm CMOS

This paper presents a new CMOS differential voltage-to-frequency converter (VFC) which targets front-end sensor interfacing in wireless sensor network applications. The proposed VFC, designed in a low-cost 0.18 μm CMOS technology supplied at 1.8 V, shows 0–1 MHz output frequency for 0–1.2 V differential input operation with nonlinearity error less than 0.4% and power consumption less than 0.4 mW. A temperature compensation technique keeps the error below 5.3% over all the frequency range for a (−20∘C,+120∘C) span.

Advanced Analog-to-Digital Conversion Using Voltage-to-Frequency Converters for Remote Sensors

This paper presents an advanced analog-to-digital conversion technique based on a voltage-to-frequency-to-digital conversion that is suitable for remote sensors, telemetry applications and multichannel data acquisition systems. A voltage-to-frequency conversion part can be based, for example, on high performance, charge-balance voltage-to-frequency converter (VFC), where monostable is replaced by a bistable, driven by an external clock, or other existing high performance VFCs. The frequency-to-digital converter “bottleneck” problem in such promised ADC scheme was solved due to proposed advanced method of the dependent count for frequency-to-digital conversion. This ADC technique lets receive many advantages such as high accuracy, relatively low power consumption, low cost solution, wide dynamic range, great stability and faster conversion time in comparison with existing VFC-based techniques. The conversion rate (6.25 µs to 6.25 ms) in such ADC scheme is programmable, non-redundant, shorter than for pulse counting technique and comparable with successive-approximation and Σ- ADC.

우주전파 수신기를 위한 IF 분배기 및 V/F 컨버터 설계

We designed the Intermediate Frequency(IF) distributor for multi beam backend system and manufactured Voltage to Frequency Converter(VFC) to measure the multi-beam receiver performance. Multi beam receiver has 15 channel receivers and can get 15 spectrums at once. The multi beam receiver has more observation efficiency than single beam receiver. We manufactured the 15 IF distributors to distribute IF signal for Autocorrelation spectrometer that is radio signal processor. Also, we manufactured the VF Converter to test the performance measurement of receiver for Korea VLBI Network(KVN) system which is under-construct in Seoul, Ulsan and Jeju. As a result of performance measurement, we could obtain linearity of 99.4% on the input power vs output frequency and measured the operating range of input frequency.

Voltage-to-frequency converter with high sensitivity using all-MOS voltage window comparator

A high-sensitivity voltage-to-frequency converter (VFC) using an all-MOS voltage window comparator is presented in this work. The circuit is composed of one voltage-to-current converter, one charge and discharge circuit, and one all-MOS voltage window comparator. The input voltage is converted into a current which in turn triggers the charge and discharge circuit, where a built-in capacitor is driven. The voltage window comparator monitors the variated voltage on the capacitor and generate an oscillated output of which the vibration frequency is linearly dependent to the input voltage. In this way, the worst-case linear range of the output frequency of the proposed VFC is 0–55.40MHz verified by simulations given a 0–0.9V input range. The physical measurement of the proposed VFC shows a 0–52.95MHz output frequency given a 0–0.9V input range. The error in linearity is better than 8.5% while the power dissipation is merely 0.218mW.

Error analysis of a dual-VFC multiplier aimed at industrial-frequency power metering

This paper presents the error analysis of a multiplier built with two cascaded voltage-to-frequency converters (VFC), aimed at industrial frequency power metering. The error sources were identified and quantified, and it was found that the major error source is the offset frequency term. The VFC response to a varying input frequency was also investigated, and no misbehaviour was detected. A simple modification that cancels the offset-frequency error is proposed. With this modification, accuracy better than 1% was obtained in laboratory tests.

An All-MOS High-Linearity Voltage-to-Frequency Converter Chip With 520-kHz/V Sensitivity

An all-MOS linear voltage-to-frequency converter (VFC) chip with 520-kHz/V sensitivity is presented in this paper. This circuit converts an input voltage into frequency by charging and discharging a capacitor. An all-MOS voltage window comparator (VWC) with reduced propagation delay is designed to improve the linearity of traditional VFCs. The propagation delay of the VWC is discussed to resolve the tradeoff between bandwidth and linearity of VFC. The proposed VFC is verified on silicon using the Taiwan Semiconductor Manufacturing Company 1P5M 0.25-mum process. The measurement results show that the linearity error is less than 1%, and the sensitivity is 520 kHz/V at an input voltage range from 0.1 to 0.8 V

New Σ-Δ Voltage to Frequency Converter Analysis and Applications

Voltage to frequency converter (VFC) is an oscillator whose frequency is linearly proportional to control voltage. There are two common VFC architectures: the current steering multivibrator and the charge-balance VFC. For higher linearity, the charge-balancing method is preferred. The charge balanced VFC may be made in asynchronous or synchronous (clocked) forms. The synchronous charge balanced VFC or "sigma delta" Sigma-Delta VFC (SVFC) is used when output pulses are synchronized to a clock. The charge balance VFC is more complex, more demanding in its supply voltage and current requirements, and more accurate. It is capable of 16 to18 bit linearity. In this paper, the new SVFC (NSVFC) is described. This NSVFC works similarly as conventional SVFC but it has a pure tone on output (for constant input voltage). Therefore, it is possible to measure the period of NSVFC output (this does not work for SVFC).

A simple VFC based wattmeter suitable for application at industrial frequency

In this paper, the design of a simple AC wattmeter is presented. Its main features are that it uses a multiplier built with two voltage-to-frequency converters (VFC), and that it can be easily connected to a digital instrument, without further analogue conditioning. The design process is described in detail, and two design approaches are presented. Tests performed in a prototype validate the suitability of the meter. A limitation is that it can only be used with null-average signals, such as those usually those found in AC metering applications.

A digital power-factor meter design

This paper is concerned with the development of a digital power-factor (PF) meter to replace the electrodynamic type. A new method is chosen to perform a PF measurement ; it is baaed on voltage-to-frequency conversion and counting techniques. One voltage-to-frequency converter (VFC) is used to convert the two DC signals into frequencies proportional to Vm and Vm cos φ, where Vm is the peak of the voltage signal and φ is the phase angle between voltage and current. A division scheme is implemented to perform the digital PF measurement.

A Digital Power-Factor Meter Design Based on Binary Rate Multiplication Techniques

This paper relates to the field of developing an electronic power-factor (PF) meter to replace the conventional electrodynamic type. The design is based on voltage to frequency conversion and binary rate multiplication techniques. For the first half measuring period, a signal proportional to the peak voltage Vm is applied to control the switching threshold level of the comparator of the voltage to frequency converter (VFC), while the input of the VFC is kept at suitable constant level, thus producing an output frequency inversely porportional to Vm, which is counted and applied as an input data to a binary rate multiplier (BRM). For the second half measuring period, a signal proportional to the product of the peak voltage and the power factor Vm cos(?), is applied to the VFC, while the threshold level of the comparator is kept constant. The VFC frequency output is then directly proportional to Vm cos(?). This is made available through gating network to the BRM frequency input. The BRM frequency output is summed over a specified period of time to provide PF information.

An Electronic Energy and Average Power-Factor Meter with Controllable Nonuniform Rate

The first part of the paper describes the design of an electronic watthour meter competitive in price and performance with the electromechanical (Ferraris) type. The circuit uses only integrated circuits (IC's) and passive components in a multiplier low-pass filter voltage to frequency converter (VFC) configuration and satisfies the design criterion. The basic design is then modified to obtain an average power-factor meter.

Analog-to-Digital Conversion Based on a Voltage-to-Frequency Converter

In this paper we discuss a method of analog-to-digital conversion based on a voltage-to-frequency converter (VFC). The basic principle of a VFC circuit is given in order to derive the exact relationship between the characteristics of the output pulse train and the input voltage. We illustrate this theoretical analysis with an example of a simple VFC circuit. The VFC output signal has to be transformed in a binary number proportional to the VFC input voltage. This is done by a digital circuit interfacing the VFC and the computer and a simple calculation in the computer. Finally, we discuss some elements influencing the quantization error of the conversion.