Voltage Balancing Approach Research Articles

Power and efficiency enhancement of solar photovoltaic power plants through grouped string voltage balancing approach

Solar photovoltaic (PV) power plants’ performance is severely impacted by multi-level irradiances or partial shading, leading to power losses and voltage instability. Also, partial shading adds further complexity to the maximum power point tracking algorithms by introducing numerous peaks in the power curves, resulting in additional losses. Numerous solutions are presented to deal with shading losses, and dynamic reconfiguration is the most effective; however, higher switch count and complex architecture make it impractical in real-world implementation. Hence, this study proposes a low-complexity architecture based on the grouped string voltage balancing approach. This approach utilizes a voltage balancing converter connected to groups of strings to enhance the power output of the array of PV plants, maintain overall system voltage stability, and eliminate the possibility of multiple peaks formation in the power curves. The effectiveness of the proposed approach is tested under numerous static and dynamic partial shadings and analyzed using power curves, power output, losses, efficiencies, and voltage stability. The validation is done by comparing the proposed approach with conventional and advanced architectures for a 32.5 kW system. The results show that the proposed method requires a 50 % reduced switch count than existing techniques, achieves 99.54 % efficiency, and maintains an average voltage stability of 0.01.

Three Parts Modulation and Hybrid DC Capacitor Voltage Balancing for a Single-Phase Two-Leg Five-Level NPC Inverter

Capacitor voltage unbalance in NPC multilevel inverters is an inherent challenge and has a severe effect on five and higher-level inverters. Current modulation-based voltage balancing schemes for five-level NPC inverters require a high number of switching, especially at high modulation index operations. Moreover, hardware-based voltage balancing techniques come with a high component count. This paper proposes a unique three-part modulation technique combined with a hybrid voltage balancing approach to reduce switching losses and maintain voltage balancing. The modulation is composed of different carrier-based modulations, while the hybrid balancing scheme combines modulation-based and hardware-based balancing techniques. Comparative switching loss analysis demonstrates a reduction in inverter switching associated with the modulation. While the voltage unbalance characteristics of the modulation are determined considering linear loading conditions. Furthermore, balancing capacity analysis and switching loss reevaluation are used to justify the hybrid balancing performance. The concept verification use Matlab-Simulink simulation and hardware experiments on a five-level single-phase NPC inverter setup operated at different modulation index and power factor conditions.

Application of modified triangular injection technique on MMC to decrease ARM current

Abstract In the area of the converter, the main focus of research is going on to improve the performance of Modular Multilevel Converter (MMC). This paper discusses the triangular injection modulation structure as well as the capacitor voltage balancing approach of the submodule (SM) for MMC converters to maintain a minimum harmonic profile as well as to achieve a lower arm current. To identify the value of Total Harmonic Distortion (THD) and arm current as a minimum in comparison with some well-known modulation methods from literature, a converter structure was developed in MATLAB Simulink environment, and the simulation results showed that the value of arm current and THD profile of MMC in case of this method was lower in comparison with typical modulations. A small prototype of the converter driven by the triangular injection method has been presented to confirm this method's validity.

A New Five-Level Voltage Source Inverter: Modulation and Control

In this article, a new five-level voltage source inverter is proposed for high-power applications. The proposed inverter is competitive in performance, component count, and control complexity compared with the conventional multilevel inverters. Also, the proposed inverter has a simple structure as it does not have any dc-link neutral points, unlike hybrid converters. Furthermore, the proposed topology can be connected in a back-to-back due to the presence of a common dc-link. Also, there is no need of isolated dc source and a complex phase-shifting transformer. In addition, a simple voltage balancing approach based on a level-shifted carrier pulsewidth modulation scheme is proposed to control the flying capacitor voltages. The proposed approach will make use of the redundancy switching states to balance the flying capacitor voltages in the proposed inverter. The steady-state and transient performance of the proposed five-level voltage source inverter and voltage balancing approach is validated through MATLAB simulation studies at different power factors and modulation indices. The simulation studies are further evaluated experimentally by a scaled-down laboratory prototype. Furthermore, the feasibility of the proposed topology is analyzed under the performance indices of voltage and current harmonic distortion, flying capacitor voltage ripples, converter power losses, and converter efficiency.

Discontinuous Space Vector Modulation Schemes for Modular Multilevel Converters

In this article, a new, simple, and generalized discontinuous pulse width modulation (PWM)-based submodule capacitor voltage balancing approach is proposed and generated within the carrier-based PWM for modular multilevel converters (MMCs). In this scheme, different variants of zero-sequence voltage (ZSV) component is injected into the pulse width modulator so that each arm of the MMC is virtually clamped to positive or negative dc bus during a specific interval to achieve discontinuous modulation. A simple approach based on the location of the voltage vector mapping to a two-level space-vector diagram is presented to determine various ZSV components. The effectiveness of the proposed scheme with a voltage balancing algorithm is demonstrated through PLECS simulations and experimentally verified using a hardware-in-the-loop-based system. The performance of MMC with different ZSV injections is holistically evaluated to determine the best possible sequence over a wide range of modulation index.

Modulation and Voltage Balancing of a Five-Level Series-Connected Multilevel Inverter With Reduced Isolated Direct Current Sources

The series connection of low-power modules is an alternative solution to realize a multilevel inverter. Unlike a cascade connection, the series connection approach significantly reduces the number of isolated dc sources, thereby the design complexity, cabling of the transformer, and overall system cost become low. In this article, the operation of the series-connected multilevel inverter is presented for a five-level operation, and it is realized by using two three-level half-bridge diode clamp converter modules per phase. Hence, each phase of the series-connected multilevel inverter requires a single isolated dc source. In the series-connected multilevel inverter, the net dc-bus voltage will be equally distributed between four dc-bus capacitors. Therefore, the converter generates a multilevel voltage waveform with uniform steps and ensures equal voltage stress on the semiconductor devices. To achieve these objectives, a space vector pulsewidth modulation scheme with an additional voltage balancing approach is employed. The feasibility of series-connected multilevel inverter is validated through simulations and a scaled-down laboratory prototype under steady-state and transient conditions.

An Optimal Voltage-Level Based Model Predictive Control Approach for Four-Level T-Type Nested Neutral Point Clamped Converter With Reduced Calculation Burden

Four-level T-type nested neutral point clamped (NNPC) converter is a newly developed multilevel voltage source converter for higher power density systems in low and medium voltage applications. The T-type NNPC converter can operate over a wide range of voltages and own less proportion of components compared with other four-level topologies, which makes it attractive among multilevel converters. In this paper, an optimal voltage-level based model predictive control (OVL-MPC) with reduced calculation burden is proposed for the T-type NNPC converter. The main objectives of this paper are to achieve the T-type NNPC converter load current control and the flying capacitors voltages balancing while remaining computationally feasible. In our proposed method, the output voltage levels are considered as the control options rather than the switching states in the conventional MPC scheme. Meanwhile, a simplified capacitor voltage balancing approach is employed to regulate the voltages of the capacitors at their desired values without punishing the computational complexity. The contribution of this paper lies in the following two aspects: first, the finite control set is decreased in the optimization processes. Second, a simplified capacitor voltage balancing strategy is introduced for the T-type NNPC converter. The performance of the proposed OVL-MPC approach for the T-type NNPC converter under steady-state, transient-operation, and unbalance mode are verified by the simulation results.

Capacitor Voltage Balancing and Current Control of a Five-Level Nested Neutral-Point-Clamped Converter

The five-level nested neutral-point-clamped (5L-NNPC) converter is one of the most promising topologies for medium-voltage (2.3–7.2 kV) high-power applications such as medium-voltage drives, wind energy conversion systems, and grid-connected systems. The 5L-NNPC requires a fewer number of switching devices, freewheeling and clamping diodes, and flying capacitors compared to the existing five-level multilevel converters. In the 5L-NNPC topology, each flying capacitor voltage is regulated at one-fourth of the dc-bus voltage to obtain the five-level operation. Due to the lack of redundant switching states, it is difficult to control the flying capacitor voltages by using the pulse-width-modulation-based classical control methods. This paper proposes a model-predictive current control (MPCC) approach to control the flying capacitor voltages along with the output currents of the 5L-NNPC converter. The discrete-time model of 5L-NNPC is developed to implement the MPCC scheme. The simulation and experimental studies are conducted to verify the dynamic and steady-state performance of 5L-NNPC with the MPCC scheme. The performance of the proposed MPCC approach is compared with the conventional space-vector-modulation-based voltage-balancing approach. Furthermore, the flying capacitor voltage control capability of MPCC is verified at different load power factors.

Voltage Balancing of a Modular Neutral-Point-Clamped Converter With a Carrier-Based Modulation Scheme

The five-level modular neutral-point-clamped (5L-MNPC) converter is realized by connecting two three-level neutral-point-clamped modules in series. For five-level operation, each dc-bus capacitor voltage of the modular neutral-point-clamped topology should be regulated at one-fourth of the net dc-bus voltage. In this letter, a simple voltage-balancing approach based on the carrier-based modulation scheme is proposed to achieve the above objectives. The proposed approach uses the redundancy switching states along with the current direction and the instantaneous value of the dc-bus capacitor voltage to achieve the voltage balancing in the 5L-MNPC topology. The dynamic performance of the 5L-MNPC topology with the proposed voltage-balancing approach is verified experimentally.

A Grid-Connected Capacitor-Tapped Multimodule Converter for HVDC Applications: Operational Concept and Control

In this paper, a dc–ac buck converter is proposed as a grid-side converter in high voltage dc (HVdc) transmission systems for high-power renewable energy source grid integration. The proposed architecture consists of multimodules of half-bridge voltage source converters (HB-VSCs). The dc terminals of the HB-VSCs are connected in series across the entire dc link (i.e., capacitor tapped), whereas their ac outputs are connected to multiwinding transformers to provide the three-phase terminals for ac grid integration. The proposed grid-connected capacitor-tapped multimodule converter (CT-MC) architecture, inspired from the HVdc shunt tap proposed by ABB, provides a dc–ac conversion with a relatively moderate voltage rating of semiconductor devices. It also provides operation with a lower number of semiconductor devices, gate driver circuits, voltage sensors, and lower total MVA rating of semiconductor devices (67%) compared with the conventional three-phase HB modular multilevel converter, which positively affects the system cost and reduces the computational burden of the employed controller. In this paper, the operational concept and control of the CT-MC are presented along with a capacitor voltage balancing approach. Simulation results are presented during normal and abnormal conditions to show the viability of the proposed architecture. Finally, a scaled down prototype for the CT-MC is employed to validate the converter operation.

Voltage-Balancing Approach With Improved Harmonic Performance for Modular Multilevel Converters

In a modular multilevel converter (MMC), the voltage balance among the submodules is mandatory to generate the multilevel stepped waveform across the load and to ensure the equal voltage stress on the semiconductor devices. In addition, the output power quality (voltage and current waveforms) and the converter reliability greatly depend on the design methodology of a voltage-balancing approach. The improper design of the balancing approach causes higher voltage and current harmonic distortion and device power losses, which further affects the efficiency of the MMC. In this letter, an improved voltage-balancing approach is proposed to reduce the output voltage harmonic distortion and device power losses. The performance of the proposed approach is verified through MATLAB simulations and experimentally on a three-level-flying-capacitor-based MMC system. Also, the performance of the proposed approach is compared with the existing methodology to prove its superiority.

A Space-Vector PWM-Based Voltage-Balancing Approach With Reduced Current Sensors for Modular Multilevel Converter

Arm voltage and submodule (SM) capacitor voltage balancing is a key factor for the safe and reliable operation of modular multilevel converters (MMCs). The arm voltage balancing is achieved through a zero-sequence voltage controller in carrier pulse-width modulation (CPWM). In this study, a dual space-vector pulse-width modulation (SVPWM) technique is proposed for an MMC, which eliminates the external controller for arm voltage balancing. In this approach, the three-phase top and bottom arms are independently controlled using SVPWM. In addition, the capacitor voltage balancing can be achieved using redundant switching vectors. However, this will increase the computational load on the space-vector modulator. Therefore, an external capacitor voltage-balancing approach is proposed to minimize the computational complexity. The proposed approach uses the direction of load current instead of the arm current in SM selection process. As such, the required number of current sensors is reduced to 50% in a three-phase system. The proposed modulation and voltage-balancing approach are simulated and experimentally verified on the MMC system with three-level flying capacitor (3L-FC) SMs. Simulation and experimental results show the successful balancing of the arm voltage and SM capacitors voltage.

A Novel Modulation Scheme and Voltage Balancing Algorithm for Modular Multilevel Converter

The control complexity of modular multilevel converter (MMC) increases with the number of submodules per arm. In particular, the implementation of a pulsewidth modulation (PWM) scheme and a voltage balancing approach for MMC is a major challenge. This paper proposes a generalized low-cost less computational decoupled sampled average PWM scheme for MMC. In this approach, the reference output voltage is generated by averaging the two nearest voltage levels from the top and bottom arms in each sampling interval. In addition, a simplified voltage balancing approach is proposed for MMC. The proposed approach does not require a sorting technique to select the submodules. Instead, the relative comparison logic is presented. The effectiveness of the proposed modulation scheme and voltage balancing approach is evaluated on a single-phase MMC system with three-level flying capacitor submodules. The proposed approach is extended to a three-phase system, which results in dynamic balancing of the zero-sequence voltage. Hence, the zero-sequence current is minimized. The performance of the proposed three-phase approach is compared with that of the conventional phase-shifted carrier PWM scheme. The simulation and experimental studies show successful voltage balancing among submodule capacitor voltage, low harmonic distortion, and less ripple in output current.

DC link voltage balancing approach for cascaded H‐bridge active rectifier based on selective harmonic elimination‐pulse width modulation

This study presents an improved voltage balancing strategy which can be employed on multilevel cascaded H-bridge (CHB) rectifiers using low switching frequency. The proposed method balances the voltage of all DC links in a CHB rectifier to a predefined value, without increasing the number of switching transitions. The redundancy states which are available in the CHB rectifier to produce a voltage level are used to balance the DC links in each transition. Moreover, using the well-known selective harmonic elimination-pulse width modulation method, all current harmonic components up to 29th harmonic are eliminated in the three-phase CHB rectifier, whereas the average switching frequency of each switch is limited to 150 Hz. The effectiveness and validity of the proposed strategy is verified by several simulations and experiments that are carried out on a 7-level CHB rectifier.