Volt-second Balance Research Articles

Optimization of the Symmetrical SVPWM for Three-Level T-Type Inverters With Unbalanced and Oscillated Neutral-Point Voltages

The symmetrical space-vector pulse-width-modulation (SVPWM) has been widely adopted in three-level (3L) T-type inverters due to its low current harmonics and high linear modulation index. However, when faced with unbalanced and oscillated neutral-point (NP) voltages, extra current harmonics will be generated. In this paper, a new solution is provided. Other than adopting the existing strategies for balancing the NP voltage, the symmetrical 3L SVPWM is optimized to work with unbalanced and oscillated NP voltages. Firstly, the vectors are idealized, based on which ideal dwell times are obtained by an analytical simplified symmetrical 3L SVPWM. Then, a dc-zero-sequence component is calculated and injected to maximize the linear modulation index, and the real dwell times are further derived after the adjustment according to the ‘volt-second balance’ principle. In addition, a control strategy is investigated to actively adjust the NP voltage. Finally, the optimized symmetrical 3L SVPWM is verified by comparative experiments, showing its low current harmonics with unbalanced and oscillated NP voltages.

A Novel Virtual Space Vector Modulation With Optimized Neutral-Point Voltage Control Capability for Ten-Switch Three-Phase Three-Level Inverter

Ten-switch three-phase three-level inverter (TP-TLI) is receiving more attentions owing to the reduced system cost compared to traditional TP-TLIs. However, it still faces serious neutral-point voltage (NPV) balance problem. This article proposes a novel virtual space vector modulation (NVSVM) with optimized neutral-point voltage control (NPVC) capability. A set of virtual vectors are selected to generate zero NP current. By analyzing the vector synthesis principle over the full modulation areas, a new control degree, which is utilized to optimize the NPVC capability and reduce line voltage THD, is introduced. Besides, a dead time compensation method based on volt-second balance is also given to reduce the switching loss. The NVSVM not only improves the NPVC capability without dc offset and obvious ac oscillations in NPV under full range of modulation index and power factor (PF) conditions, but also reduces line voltage THD and the switching loss. Theoretical analysis shows that the available NP current for the proposed NVSVM is about 2.75 times greater at most than that for traditional VSVM. Simulation and experimental results are given to validate the effectiveness of the NVSVM and control strategies.

Quasi-Symmetrical SVPWM Scheme Based on General Volt-Second Balance Model for a Three-Phase Isolated AC–DC Matrix Converter

Quasi-Symmetrical SVPWM Scheme Based on General Volt-Second Balance Model for a Three-Phase Isolated AC–DC Matrix Converter

Battery-Friendly DC–DC Converter With Ripple-Free Current Modulation Strategy

In this article, a battery-friendly dc–dc converter with a ripple-free current technique is proposed interfaced battery energy storage system (BESS). Two-phase interleaved circuits are adopted to cancel the current ripple on the BESS side. On the high voltage (HV) side, the circuit combined with a half-bridge circuit and full-bridge circuit is employed to achieve voltage-second balance control. With the associated control strategy, the power control variables can be decoupled. The voltage-second balance control on two ends of the leakage inductor is realized by the adjustment of the duty cycle. After that, the transferred power only changes monotonously along with the change of phase shift angle. The zero-voltage switching (ZVS) conditions are analyzed in detail to ensure that the ZVS of all switches can be achieved through parameter design. Moreover, a comparison is conducted to illustrate the merits of the proposed converter. The theoretical analysis has been fully validated experimentally by an experimental prototype of 40–60 V to 400 V/1 kW operating at 50 kHz. The accordance between the theoretical analysis and experimental verification further testifies to the effectiveness.

Nonisolated DC–DC Power Converter Synthesis Using Low-Entropy Equations

There is a growing demand for novel nonisolated dc–dc power converters with the deployment of dc power distribution systems integrating renewable sources and energy storing elements. The load and source of these applications have different input and output voltage levels, and it is vital to avoid operating the interfacing power converters at extreme duty ratios. Therefore, engineers and researchers explore the power converter synthesizing techniques since the mid-1970s, fulfilling the above requirement besides the nonpulsating input and output current. Among them, the analytical synthesis method has gained popularity, although it gives rise to high-entropy equations. This article shows a simple yet powerful topology synthesis method based on the low-entropy equations that reveal the connection between the energy storing elements and switches. To this end, a set of design rules have been introduced in this article to realize the voltage-second balance equations obtained by decomposing the voltage gain polynomial using design-oriented analysis. Moreover, different decomposition levels of the gain polynomial have been discussed to embed inductors at either input or output or both ports. Furthermore, the synthesis of multitopology converters using low-entropy equations has been demonstrated. The applicability of the proposed method is validated using motivational examples and using experimental results of the selected converters.

Parameter design and control of a novel three-phase single-switch power factor correction (PFC) circuit

Three-phase single-switch power factor correction (PFC) circuit has the advantages of simple structure and convenient control, and its current source characteristics is conducive to achieve higher power by parallel interleaving. But theoretical analysis of the circuit was complex and the design theory was not established yet. To solve these problems, a parameters design method based on volt-second balance of the input inductance is proposed. By this method, the key component parameters of a 7.6 kW experimental prototype are designed. At the same time, A constant on-time control method of this circuit based on MATLAB simulation is designed, which can be applied to various converters with constant on-time control. The parameters and control design method of the single-switch PFC circuit are simulated based on the MATLAB. A prototype is built and tested also, the test results verify the correctness of the parameter design theory and constant on-time control simulation method.

A Topology Generation and Synthesis Method for Boost Converters Based on Inductive Volt-Second Balance Theory

In this paper, a comprehensive method is proposed to derive the boost DC–DC converter from a given gain formula. The given gain formula is obtained by analyzing, generalizing, and summarizing previous boost structures in the literature. The analysis is based on the volt-second balance theory of inductors. Thus, the gain formula is only related to two elements, the connection between components and the duty cycle of the switches. Therefore, the topology corresponding to the gain can be derived and synthesized according to the connection of the inductors and the capacitor components during the commutation of the switch to meet the demand for different boost converters in different applications. Meanwhile, all the three-order gain formulas generated by this method are analyzed and three of them are selected for topology simplification and focus analysis, and the correctness of the selected topologies is verified by the simulation results and experimental results.

Common-Mode Voltage Reduction and Neutral-Point Voltage Control Using Space Vector Modulation for Coupled Ten-Switch Three-Phase Three-Level Inverter

Space vector pulsewidth modulation (SVPWM) provides enhanced performance for the coupled ten-switch three-phase three-level inverter (TP-TLI). However, it suffers from high common-mode voltage (CMV) and unbalanced neutral-point voltage (NPV). To solve this problem, a CMVR_SVPWM with CMV reduction and NPV control (NPVC) is proposed in this article. By using suitable vectors with lower CMVs and sequences, the amplitude of CMV is suppressed to 50% of the previous strategies for ten-switch TP-TLI. A newly control degree is explored to regular the NPV through the two pairs of newly virtualized vectors in each sector. The dwell time of each selected vector is indirectly calculated to cooperate the NPVC with the CMVR_SVPWM. By enhancing the dwell time of the desired small vector, the NPV can be balanced while maintaining the almost same output quality. The dead-time effect is analyzed, and the resulting CMV spikes is eliminated by increasing the dwell time of the vector which is less than twice the compensation time. It preferentially attempts to eliminated the CMV spikes based on volt-second balance. This minimizes the effect of the proposed compensation method on output quality. A 3-kVA experimental prototype is built up to verify the feasibility and performance of the proposed CMVR_SVPWM.

IPOS three-state boost converter and its volt-second balance method based output voltage sharing control strategy for bipolar DC bus applications

IPOS three-state boost converter and its volt-second balance method based output voltage sharing control strategy for bipolar DC bus applications

A control strategy for multiphase series capacitor boost converter with automatic current sharing and n-times gain capability

Inspired by the advantages of multiphase series capacitor boost converter, its automatic current sharing and N-times gain control strategy is proposed and investigated. Theoretical analysis is developed through capacitor charge balance and inductance volt-second balance. Then the constraint conditions of operating modes time are obtained to balance the phase current and achieve N-times gain. The final control strategy was obtained by the optimized timing sequence arrangement of the modes. The proposed control strategy is applied in 4-phase series capacitor Boost converter for CCM operation for duty cycle 0 to 1. Without any additional sensors or other devices, the automatic current sharing is achieved. The current of each phase is automatically distributed evenly among the phases, and N-times voltage gain is achieved. Finally, simulation results are given to verify the analysis of the proposed control strategy.

Compensatory Model Predictive Current Control for Modular Multilevel Converter With Reduced Computational Complexity

Model predictive control (MPC) is widely used in modular multilevel converter (MMC) control because of its strong robustness, fast dynamic response, and strong stability. Traditional MPC must traverse several switch combinations to accurately regulate the output current and circulating current of the MMC. Therefore, as the number of sub-module (SM) grows, the controller’s computational complexity grows. This paper proposes a compensatory model predictive current control (CMPCC) for inner loop current control. It immediately estimates the number of SMs required by the bridge arm without scrolling optimization, reducing the amount of calculation of the system and improving the output current and circulating current tracking accuracy to the references. The objective function is established based on the system output current and internal circulation current by developing the discretization mathematical model of MMC. On the basis of minimizing the optimization scope, the compensation prediction is achieved through the volt-second balance, to achieve effective current control. Subsequently, an uneven bucket sorting algorithm is proposed to drastically eliminate the unnecessary sorting process. Finally, both a MATLAB/Simulink model and an experimental platform of MMC are built. To verify the practicality of the proposed control strategy, simulation and hardware experiments are provided.

An Optimized Space Vector Based Switching Algorithm With Reduced Switching Transitions for Impedance Source Inverter

In a 3L-VSI, to realize reference vector, maximum of six switching per sub-cycle are permitted. A similar condition is looked for in 3L-ZSI (z source inverter). The current continuous SVPWM methods of 3L-ZSI have adopted two approaches to meet the desired condition. These are a selection of sub-cycles generating six and eight switching employing correct volt-second balance. The sub-cycles generating eight switching has the demerit of increased losses. Here a new switching pattern has been proposed to optimize the number of switching. The dependency of the modulation index and sub-cycle duration on the switching frequency has also been discussed. With the increase in carrier frequency, the proposed PWM technique offers a decrease in switching losses compared to the existing ones. This leads to the improved efficiency of 3L-ZSI.To verify the efficacy of the proposed technique, simulation and prototype results are presented.

A practical stable control scheme under end point equivalence modulation for DC power supply converters

A series of DC power supply converters can be described as linear affine systems with finite inputs and constrained switching frequency. In this study, a practical-stability-oriented general control framework with duty-cycle-like characteristics is deduced for such converters. First, a concept called End Point Equivalence Modulation (EPEM) is introduced to release constraints. Following this, a Control Lyapunov Function (CLF) is employed to design the switching law and the relationship between the boundary of the convergence zone and the switching frequency is derived. In addition, an optimized switching strategy is presented to halve the switching frequency without degrading the control performance, which is also helpful for reducing switching loss. Finally, a single-phase inverter and buck converter are considered as case studies and analysis show that Sinusoidal Pulse Width Modulation (SPWM) and volt-second balance guarantee their practical stability, respectively, which can be theoretically derived and proved under EPEM. All the proposed methods and controllers are validated both by simulations on MATLAB/Simulink and experiments in a rapid control prototype platform based on a FPGA module.

Transient DC Bias Current Reducing for Bidirectional Dual-Active-Bridge DC–DC Converter by Modifying Modulation

Transient dc bias current will appear in dual-active-bridge (DAB) dc-dc converter when power changes, resulting in transformer core saturation. Traditionally, a transitional period with extra calculation is added in the transient process to keep the voltage-second balance and eliminate the dc bias current for the DAB converter. In this article, the modulation process rather than the phase-shift control is concerned, and the transient dc bias current can be reduced or even eliminated by staggering the load time of the primary bridge and secondary bridge compare values. The modulation scheme with this modification does not need any transitional period or extra calculation, and the time delay in the closed-loop control is constant and smaller than the previous schemes. Besides, as only the load time is modified, the modulation scheme can be implemented in all the phase-shift control methods and the whole operation range. The experimental results verify the theoretical analysis and show the practical feasibility of the modified modulation schemes.

Selective Lower Order Harmonic Elimination in DC-AC Converter Using Space Vector Approach

A novel space vector-based approach is introduced in this brief to selectively eliminate the lower order harmonics from the DC-AC converter output waveform by making use of double switching clamping sequences. This technique uses a volt-second balance for control of fundamental voltage while using the dwell time rearrangement of the active vector in a sub-cycle to obtain the elimination of fifth or seventh harmonics. Further, the closed-form expression of the dwell time-division coefficient (DTDC) for the active vector dwell time division rearrangement is expressed. The proposed PWM technique is compared with other space vector-based PWM techniques in terms of voltage weighted total harmonic distortion, switching power loss, and lower order harmonic magnitudes. Further, the experimental results are presented to show the effectiveness of the proposed PWM techniques in terms of harmonic elimination.

Integrated predictive control and fault diagnosis algorithm for single inductor-based DC-DC converters for photovoltaic systems

PurposePower converters are an integral part of the energy conversion process in solar photovoltaic (PV) systems which is used to match the solar PV generation with the load requirements. The increased penetration of renewable invokes intermittency in the generated power affecting the reliability and continuous energy supply of such converters. DC-DC converters deployed in solar PV systems impose stringent restrictions on supplied power, continuous operation and fault prediction scenarios by continuously observing state variables to ensure continuous operation of the converter.Design/methodology/approachA converter deployed for a mission-critical application has to ensure continuous regulated output for which the converter has to ensure fault-free operation. The fault diagnostic algorithm relies on the measurement of a state variable to assess the type of fault. In the same line, a predictive controller depends on the measurement of a state variable to predict the control variable of a converter system to regulate the converter output around a fixed or a variable reference. Consequently, both the fault diagnosis and the predictive control algorithms depend on the measurement of a state variable. Once measured, the available data can be used for both algorithms interchangeably.FindingsThe objective of this work is to integrate the fault diagnostic and the predictive control algorithms while sharing the measurement requirements of both these control algorithms. The integrated algorithms thus proposed could be applied to any converter with a single inductor in its energy buffer stage.Originality/valuelaboratory prototype is created to verify the feasibility of the integrated predictive control and fault diagnosis algorithm. As the proposed method combine the fault detection algorithm along with predictive control, a load step variation and manual fault creation methods are used to verify the feasibility of the converter as with the simulation analysis. The value for the capacitors and inductors were chosen based on the charge-second and volt-second balance equations obtained from the steady-state analysis of boost converter.

Bidirectional single-loop current sensorless control applied to NPC multi-level converter considering conduction losses

The current feedback is considered as unavoidable part of most control system driving power electronic converters. However, it is possible to eliminate the use of current sensor, if properly calculated volt-second balance is applied to input inductor. This paper describes the implementation of current sensorless control technique applied to neutral point clamped multi-level converter, where only voltage control-loop is used to stabilize internal capacitors voltage, while inductor’s current is shaped by means of current sensorless control block in both discontinuous and continuous current modes. The capacitor voltage balancing is implemented by means of delta-controller that selects alternative capacitor in respect to main switching scheme. Finally, the analytical study of proposed solution is verified with simulation results.

Synthesizing a Family of Converters for a Specified Conversion Ratio Using Flux Balance Principle

Nonisolated dc–dc converters are fundamental building blocks in the power supply for a wide range of applications. To cater to this heterogeneity in applications, development of dc–dc converters with suitable voltage conversion ratio ( G ) is imperative. Given a converter topology, G can be found out uniquely by using the principle of inductor volt-second balance, and the process of obtaining the voltage conversion ratio from the topology is simple. In contrast, the inverse problem, i.e., the process of obtaining the converter topology for a given voltage conversion ratio ( G ) is a challenging task, and the obtained topology is also not unique. This article presents a simple method to obtain a family of converter topologies from a required voltage conversion ratio. This method utilizes the principle of inductor flux balance as a synthesis tool. The step-by-step procedure to synthesize the converter topologies is outlined. To illustrate the efficacy of the proposed method, it is applied to synthesize various quadratic buck–boost topologies, and a family of converters is identified. Operation and feasibility of two novel topologies, identified by the proposed theory, are verified experimentally.

Dynamic and Adjustable New Pattern Four-Vector SVPWM Algorithm for Application in a Five-Phase Induction Motor

In order to improve the Direct Current (DC) bus utilization ratio and realize harmonic suppression of a five-phase induction motor, the SVPWM (Space Vector Pulse Width Modulation) algorithm was researched in depth. Based on an analysis of the present SVPWM algorithm and the volt-second balance principle, a dynamic and adjustable new pattern four-vector SVPWM algorithm was proposed. The algorithm uses the modulation index and zero vector to improve the characteristics of the inductor motor, the function relationship with real-time dynamic ratio between the action–time ratio of the space voltage vector and the modulation index was proposed to maximize DC bus utilization ratio, and the random zero-vector dynamic modulation mode was used to reduce harmonic influence, being able to spread harmonics concentrated around certain frequencies across a wider frequency band and thus produce a more continuous and uniform power spectrum. The new algorithm model was built using Matlab/Simulink, and the simulation and experimental results demonstrated that the algorithm is effective and feasible.

A Single-Stage Fault-Tolerant Three-Phase Bidirectional AC/DC Converter With Symmetric High-Frequency Y-Δ Connected Transformers

This article presents a single-stage isolated three-phase bidirectional ac/dc converter with symmetric Y-Δ connected transformers, which implements ac/dc buck conversion, high-frequency electrical isolation, and high power factor for ac side (PF > 0.99). The converter can be utilized between the ac bus and the dc bus in ac–dc hybrid microgrid and in other applications where three-phase bidirectional ac/dc conversion is needed. With two operating modes available, the converter possesses the fault-tolerant ability and the improved light-load efficiency. When the converter works in the high power application with all the components operating normally, the transformers operate in the symmetric mode and share the power equally. Then, the switch current stress can be reduced. The converter can also operate in dual transformer mode for light-load conditions or with some abnormal components. The Y-Δ connected transformers provide an additional step-down conversion ratio and make the converter suitable for buck conversion. Furthermore, to guarantee the voltage-second balance of the transformers, the corresponding space vector pulse width modulation (SVPWM) algorithm is proposed. Experimental results based on a 2.4-kW prototype are presented in detail, which verify the theoretical analysis and demonstrate the converter's performance well.