Vertical Feedthroughs Research Articles

Low temperature approach for high density electrical feedthroughs for neural implants using maskless fabrication techniques.

Implantable electronic packages for neural implants utilize reliable electrical feedthroughs that connect the inside of a sealed capsule to the components that are exposed to the surrounding body tissue. With the ongoing miniaturization of implants requiring ever higher integration densities of such feedthroughs new technologies have to be investigated. The presented work investigates the sealing of vertical feedthroughs in aluminum-oxide-substrates with gold stud-bumps. The technology enables integration densities of up to 1600/cm 2 while delivering suitable water leak rates for realistic implantation durations of miniaturized packages (feedthrough-count $>50$, package-volume $<2$ cm $^{3})$ of more than 50 years. All manufacturing steps require temperatures below $420 ^{\circ}\mathrm {C}$ and are suitable for maskless rapid prototyping.

A new fabrication process of TGV substrate with silicon vertical feedthroughs using double sided glass in silicon reflow process

This paper presents a new fabrication process of through glass via (TGV) substrate, which combines glass and silicon into a single wafer. By using double sided glass in silicon reflow process with a patterned silicon mold, a thick and robust TGV substrate which is difficult or timewasting to realize by single side glass reflow process could be achieved. The fabrication process and parameters are studied in details. Surfacing roughness of the TGV substrate after polishing is measured to be 3.421 nm, showing a high surface quality for anodic bonding process. Resistance of vertical feedthroughs are measured in the range of 180 to 260 Ω, indicating that the substrate can be used in a large variety of application. Finally, strength tests of the bonding interface are measured to be as high as 7.28 MPa, indicating a mechanically strong bonding.

Characterization of signal transfer performance of a through glass via (TGV) substrate with silicon vertical feedthroughs

In this paper, we present an analysis of signal transfer performance of the through glass via (TGV) deposited with metal electrodes. Because of the parasitical effects, signal will be weakened and phase delayed after transferring through the TGV substrate. Amplitude attenuation and phase delay of the signal ranging from 10Hz to 107Hz are extracted in the experiment part, showing that little negative effects will generate when the signal frequency is not very high. Then, frequency response of the resonator is tested, showing the feasibility of exciting the resonator by transferring the signal through the TGV substrate when the signal frequency is about 5kHz. The characterization of signal transfer performance is expected to be helpful in guiding the application and structure design of the TGV substrate.

A method for wafer level hermetic packaging of SOI-MEMS devices with embedded vertical feedthroughs using advanced MEMS process

This paper presents a novel, inherently simple, and low-cost fabrication and hermetic packaging method developed for SOI-MEMS devices, where a single SOI wafer is used for the fabrication of MEMS structures as well as vertical feedthroughs, while a single glass cap wafer is used for hermetic encapsulation and routing metallization. Hermetic encapsulation can be achieved either with the silicon-glass anodic or Au–Si eutectic bonding techniques. The dies sealed with anodic and Au–Si eutectic bonding provide a low vertical feedthrough resistance around 50 Ω. Glass-to-silicon anodically and Au–Si eutectic bonded seals yield a very stable cavity pressure below 10 mTorr with thin-film getters, which are measured to be stable even after 311 d. The package pressure can be adjusted from 5 mTorr to 20 Torr by using different outgassing, cavity depth, and gettering options. The packaging yield is observed to be around 64% and 84% for the anodic and Au–Si eutectic packages, respectively. The average shear strength of the anodic and eutectic packages is measured to be higher than 17 MPa and 42 MPa, respectively. Temperature cycling, high temperature storage, and ultra-high temperature shock tests result in no degradation in the hermeticity of the packaged chips, proving perfect thermal reliability.

Advanced MEMS Process for Wafer Level Hermetic Encapsulation of MEMS Devices Using SOI Cap Wafers With Vertical Feedthroughs

This paper reports a novel and inherently simple fabrication process, so-called advanced MEMS ( aMEMS ) process, that is developed for high-yield and reliable manufacturing of wafer-level hermetic encapsulated MEMS devices. The process enables lead transfer using vertical feedthroughs formed on an Silicon-On-Insulator (SOI) wafer without requiring any complex via-refill or trench-refill processes. It requires only seven masks to fabricate the hermetically capped sensors with an experimentally verified process yield of above 80%. Hermetic encapsulation is achieved by Au–Si eutectic bonding at 400 °C, and the pressure inside the encapsulated cavity has been characterized to be as low as 1 mTorr with successfully activated thin-film getters. The pressure inside the encapsulated cavity can also be adjusted in the range of 1 mTorr-5 Torr by various combinations of outgassing and gettering options in order to satisfy the requirements of different applications. The package pressure is being monitored for the selected chips and is observed to be stable below 10 mTorr since their fabrication about 10 months ago. The shear strengths of several packages are measured to be as high as 30 MPa with average shear strength of 22 MPa, indicating a mechanically strong bonding. The robustness of the packages is tested by thermal cycling between 100 °C and 25 °C, and absolutely no degradation is observed in the hermeticity and the package pressure. The package pressure is also verified to remain unchanged after storing the packages at a high storage temperature of 150 °C for 24 h. Furthermore, the packaged chips are observed to withstand a high temperature shock test performed at 300 °C for 5 min, at the end of which the characteristics of the encapsulated sensor indicates that the package still remains hermetic (no detectable leaks) and also the package pressure remains constant at $\sim 20$ mTorr. [2014-0338]

Wafer level hermetic sealing of MEMS devices with vertical feedthroughs using anodic bonding

This paper presents a new method for wafer-level hermetic packaging of MEMS devices using a relatively low temperature anodic bonding technique applied to the recently developed advanced MEMS (aMEMS) process. The aMEMS process uses vertical feedthroughs formed on an SOI cap wafer, eliminating the need for any complex via-refill or trench-refill steps while forming the vertical feedthroughs. The hermetic sealing process is achieved at 350°C by using an anodic bonding potential of 600V. The bonding process does not require any sealing material on neither the cap nor the sensor wafer. The packaging yield is experimentally verified to be 94% for 4 wafers packaged up to date, and the cavity pressure is measured to be as low as 1mTorr with successfully activated Titanium thin film getter. The cavity pressure can be set to different levels ranging from 1mTorr up to 5Torr, simply by varying the outgassing period and utilization of the getter material, enabling the proposed method be used for various types of MEMS devices with different pressure requirements. The pressure inside the encapsulated cavities has been monitored for 6 months since the first prototypes, and it is observed that pressure is stable below 5mTorr throughout this period. The shear strength of 6 packages is measured to be above 10MPa, whereas the shear failure occurs not at the bonding interface but the vertical feedthroughs, which have lower strength compared to the bonding region. The robustness of the packages is tested by subjecting them to cyclic thermal tests between 100°C and 25°C, and no degradation is observed in the hermeticity of the packages at the end of this period. The vacuum level of the packages is also verified to be unchanged by storing the packages at 150°C for 24h. Moreover, it is experimentally verified that the hermeticity of the packaged chips can withstand ultra-high temperature shocks as high as 400°C for 5min.

A Method of Fabricating Vacuum Packages with Vertical Feedthroughs in a Wafer Level Anodic Bonding Process

Abstract This paper presents a new method for wafer level vacuum packaging of MEMS devices using anodic bonding together with vertical feedthroughs formed on an SOI cap wafer, eliminating the need for any sealing material or any complex via-refill or trench-refill vertical feedthrough steps. The packaging yield is experimentally verified to be above 95%, and the cavity pressure is characterized to be as low as 1 mTorr with the help of a thin-film getter. The shear strength of several packages is measured to be above 15 MPa.

Wafer-level vacuum packaging with lateral interconnections and vertical feedthroughs for microelectromechanical system gyroscopes

A wafer-level vacuum packaging based on anodic bonded glass-silicon-glass triple stack with both lateral interconnections and vertical feedthroughs is presented. A z-axis gyroscope is packaged and tested to verify the packaging process. The packaged gyroscope achieved a Q factor of 26000, increased by a factor of 30 when compared to the same gyroscope without vacuum packaging. The pressure in the packaged cavity is ∼100 Pa, and the stability of the Q factor in three months is ∼3%. Experiment results indicate that the proposed wafer-level vacuum packaging is feasible and suitable for high-performance wafer-level packaged gyroscopes.

Analysis and wafer-level design of a high-order silicon vibration isolator for resonating MEMS devices

This paper presents the analysis and preliminary design, fabrication, and measurement for mechanical vibration-isolation platforms especially designed for resonating MEMS devices including gyroscopes. Important parameters for designing isolation platforms are specified and the first platform (in designs with cascaded multiple platforms) is crucial for improving vibration-isolation performance and minimizing side-effects on integrated gyroscopes. This isolation platform, made from a thick silicon wafer substrate for an environment-resistant MEMS package, incorporates the functionalities of a previous design including vacuum packaging and thermal resistance with no additional resources. This platform consists of platform mass, isolation beams, vertical feedthroughs, and bonding pads. Two isolation platform designs follow from two isolation beam designs: lateral clamped–clamped beams and vertical torsion beams. The beams function simultaneously as mechanical springs and electrical interconnects. The vibration-isolation platform can yield a multi-dimensional, high-order mechanical low pass filter. The isolation platform possesses eight interconnects within a 12.2 × 12.2 mm2 footprint. The contact resistance ranges from 4–11 Ω depending on the beam design. Vibration measurements using a laser-Doppler vibrometer demonstrate that the lateral vibration-isolation platform suppresses external vibration having frequencies exceeding 2.1 kHz.

Fabrication and Characterization of a Wafer-Level MEMS Vacuum Package With Vertical Feedthroughs

This paper reports a MEMS vacuum package with vertical feedthroughs formed in a glass substrate all at the wafer level. This approach satisfies requirements for MEMS vacuum packages, including small size, vacuum/hermetic capability, sealed and low parasitic feedthroughs, wafer-level processing, compatibility with most MEMS processes, and low cost. It also enables flip-chip solder attachment to a PC board. The package has an integrated micro-Pirani gauge on a glass substrate for in situ monitoring, a silicon cap, and vertical feedthroughs through the glass. The integrated Pirani gauge has 0.6 milli-torr resolution at 0.1 torr and 0.2 torr resolution at 100 torr. Using the Pirani gauge, the fabricated vacuum package is characterized. The package has maintained ~33 torr base pressure with plusmn1.5 torr uncertainty for more than four months without a getter. The long-term measured pressure uncertainty is from the measurement setup and environment, and can be improved using a getter inside the package. [2007-0160]

Low temperature epoxy bonding for wafer level MEMS packaging

In this paper, we report on a technology for wafer-level MEMS packaging with vertical via holes and low temperature bonding using a patternable B stage epoxy. We fabricated via holes for vertical feed-throughs and then applied bottom-up copper electroplating to fill the via holes. For low temperature wafer level packaging, we used B-stage epoxy bonding in the sealing line. The optimal bonding parameters were 150 °C and 30 min. The tensile strength was about 15 MPa. Therefore, this packaging technology can be used for low temperature wafer level packaging for many MEMS devices.

Novel LTCC/BGA modules for highly integrated millimeter-wave transceivers

Advanced packaging concepts for highly integrated encapsulated millimeter-wave modules are demonstrated. Millimeter-wave monolithic integrated circuits (MMICs) are flip-chip mounted on top of a low-temperature co-fired ceramic (LTCC) package. This type of "smart package" can integrate various passive functions as well as compact interconnections between MMIC and vertical feedthroughs. The bottom side of this package is connected via a standard ball grid array (BGA) to a low-cost laminate printed circuit board serving as a motherboard for multiple LTCC modules. Fabricated passive LTCC test structures fully validate the approach for millimeter-wave applications. LTCC-/BGA-based packages feature good performance up to approximately 30 GHz. Alternatively to BGA technology, anisotropic conductive pastes are applied as well. They have proven to be suitable at least up to 40 GHz.