Vernier Technique Research Articles

Investigation of the higher-order harmonics of internal Vernier envelopes on the sensitivity enhancement of the integrated all-fiber cascade Fabry–Perot strain and temperature sensor

Fiber optic sensors have emerged as a promising technology for precise measurements in various applications. In this study, we propose an integrated all-fiber Cascade Fabry–Perot (CFP) sensor that uses the harmonic Vernier effect to enhance its sensitivity. The sensor consists of a Silica Capillary Tube (SCT) fusion spliced to a Single-Mode Fiber (SMF), and its cavity length is optimized to locate Vernier’s internal envelopes for three different Vernier harmonic orders within the spectral range of 1500 nm–1600 nm. Three CFPs were fabricated and utilized as strain and temperature sensors. By analyzing and tracing Vernier’s internal envelopes, we experimentally demonstrated that sensitivity was improved, with the second harmonic order Vernier internal envelope exhibiting higher sensitivity than the lower Vernier harmonic orders. As a result, using the harmonic Vernier technique, we increased the temperature and strain sensitivity of the fiber optic Fabry–Perot sensor to 359.4 pm/°C and -25.1 pm/με, respectively. The proposed CFP sensor provides a simple, cost-effective, and reliable solution for various sensing applications that require high sensitivity and accuracy.

Cavity-Enhanced Vernier Spectroscopy with a Chip-Scale Mid-Infrared Frequency Comb

Chip-scale optical frequency combs can provide broadband spectroscopy for diagnosing complex organic molecules. They are also promising as miniaturized laser spectrometers in applications ranging from atmospheric chemistry to geological science and the search for extraterrestrial life. While optical cavities are commonly used to boost sensitivity, it is challenging to realize a compact cavity-enhanced comb-based spectrometer. Here, we apply the Vernier technique to free-running operation of an interband cascade laser frequency comb in a simple linear geometry that performs cavity-enhanced chemical sensing. A centimeter-scale high-finesse cavity simultaneously provides selective mode filtering and enhancement of the path length to 30 meters. As a proof-of-concept, we sense transient open-path releases of ppm-level difluoroethane with 2 ms temporal resolution over a 1 THz optical bandwidth centered at 3.64 $\mu$m.

Jitter-Quantizing-Based TRNG Robust Against PVT Variations

Security is critical to the growing popularity of the Internet of Things(IoT), and true random number generator (TRNG) plays an increasingly important role in information security systems. Conventional TRNGs use natural physical stochastic processes including thermal noise, chaos-based circuit, and so on to generate random numbers. These analog circuits based TRNG structures often consume excessive hardware resources. Meanwhile, it is difficult to incorporate them into digital system. In this paper, a novel all-digital true random number generator in SRAM-based FPGAs is proposed by using Vernier technique that precisely quantize random edge jitter. The proposed TRNG design is implemented on Xilinx Virtex-6 XC6VLX240T-1FF1156 FPGA and shows a high quality of randomness which has passed the NIST test suite with relatively high p-values, achieves a high throughput of 127 Mbps with occupying 32 slices. Experimental results show a good tolerance to bias phenomenon induced by process, voltage, and temperature variations.

Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies

This paper presents two ultra-high-speed SerDes dedicated for PAM4 and NRZ data. The PAM4 TX incorporates an output driver with 3-tap FFE and adjustable weighting to deliver clean outputs at 4 levels, and the PAM4 RX employs a purely linear full-rate CDR and CTLE/1-tap DFE combination to recover and demultiplex the data. NRZ TX includes a tree-structure MUX with built-in PLL and phase aligner. NRZ RX adopts linear PD with special vernier technique to handle the 56 Gb/s input data. All chips have been verified in silicon with reasonable performance, providing prospective design examples for next-generation 400 GbE.

Mid-infrared frequency comb for broadband high precision and sensitivity molecular spectroscopy.

We report on the experimental demonstration of the metrological and spectroscopic performances of a mid-infrared comb generated by a nonlinear downconversion process from a Ti:sapphire-based near-infrared comb. A quantum cascade laser at 4330 nm was phase-locked to a single tooth of this mid-infrared comb and its frequency-noise power spectral density was measured. The mid-infrared comb itself was also used as a multifrequency highly coherent source to perform ambient air direct comb spectroscopy with the Vernier technique, by demultiplexing it with a high-finesse Fabry-Perot cavity.

High Performance Integrated Circuits for Biomedical Imaging Applications

Biomedical imaging modalities, such as time-of-flight (ToF) positron emission tomography (PET) and fluorescence-lifetime imaging microscopy (FLIM) have been primarily employed for molecular and cellular imaging in medical diagnosis and the health care fields [1]. In particular, ToF-PET plays a critical role in cancer detection at an early stage due to its noninvasive, in-vivo characteristics. To obtain high precision, high temporal resolution and high contrast medical images, state-of-the-art electronics with high sensitivity, high counting rates and fine time resolution are needed. To meet these requirements, single photon avalanche diodes (SPAD) are employed as extremely sensitive photo-detectors. SPADs have compact size and can be designed and manufactured in a standard low-cost CMOS technology [2-4]. Figure 1a shows a schematic diagram of our SPAD-based bioimaging system. As the time intervals between two coincidence pulses from ToF-PET detectors have a direct relationship with the spatial resolution of the final reconstructed PET images, our principal work is to design a time-to-digital converter (TDC) which has sub-gate time resolution, small area and low-power consumption, and is integrated with the SPADs in the same CMOS technology. A Vernier-gated ring oscillator TDC is used. Figure 1b shows the block diagram of the proposed TDC. The TDC proposed employs Vernier technique to achieve fine time resolution. Two delay lines are arranged in a ring format such that pulses can propagate continuously (more than once) inside the rings. The dynamic range is increased by utilizing digital counters. Using this ring configuration in Vernier mode, fine resolution and large dynamic range are easily achieved simultaneously with short delay chains, and hence requires less silicon area occupation. The proposed TDC has its intrinsic first-order tolerance towards common mode noises, because the delay-cells are configured in the differential method. Additional common mode noise tolerance is provided by the Vernier operation behavior. The TDC is implemented in a commercial, mainstream 0.13μm CMOS technology. With the proposed Vernier-gated ring oscillator TDC, less than 10ps time resolution is achieved. This will greatly help improve the spatial resolution of the final reconstructed images, making an early detection of cancers and/or small size cancers possible. Future work will aim to integrate the proposed TDC with SPADs for digital silicon photomultiplier (SiPM).

A Nanosecond Vernier Time Analyzer

The instrument is the result of the development work started three years ago when we introduced the Vernier method (1), (2), (3), (4), but since then other instruments, based on the Vernier technique, have been developed (5), (6) and used (7). The block scheme of the instrument is shown in Fig. 1.

Multi-vernier time-to-digital converter implemented in a field-programmable gate array

The method of time-to-digital conversion is described which is based on the N-times multiplied vernier technique and statistical evaluation of measurement results. The test results of an integrated converter created on a single field-programmable gate array (FPGA) device manufactured by Quick Logic are also presented. The measuring range was 6 ns with 205 ps resolution. In this method quick starting and highly stabilized vernier oscillators are not required. So an exact match between the physical structure of the converter and the topology of the programmable device is not required and time delays resulting from different signal paths can be discarded.

Application of vernier thinning techniques to segmented annular arrays

Due to the aperture periodicity, the inter-element spacing of two-dimensional squared arrays is maintained near λ/2 in order to avoid grating lobes. This condition gives rise to severe problems derived from the huge number of array elements and from their little size that causes the signal to noise ratio to bring down. Vernier techniques have been proposed to lower the number of active elements, but the drastic reduction of the ultrasonic energy is still a great problem for the image contrast. In this work, vernier techniques for segmented annular (SA) arrays are theoretically studied. SA arrays produce lower grating lobes than squared arrays and, therefore, allow the element size to be increased beyond the λ/2 constraint. Using larger elements, SA arrays have advantage to squared arrays because they have larger active area and smaller thinning order for the same complexity (number of channels) of the image system. Theoretical results of the vernier techniques applied to SA arrays in both radial and tangential directions are presented and compared with the equivalent squared array.

Source-synchronization and timing vernier techniques for 1.2-GB/s SLDRAM interface

This paper describes a validation system for an SLDRAM interface. The SLDRAM system utilizes two techniques to achieve a high data-transfer rate with a conventional module mounting style. The first technique is a source-synchronization scheme. Since the chip that transmits data also supplies the data clock, the clock and data are completely synchronous. The second is the timing vernier technique. A wait time for output data is programmable in each SLDRAM. Therefore, the time at which data arrive at the controller from any SLDRAM can be set by the controller with a 200-ps step size. The validation chip is designed to emulate these operations. The chip is fabricated using a 0.35-/spl mu/m CMOS process technology and packaged in a conventional 0.65-mm pitch thin small out-line package, mounted on a single-chip module, and put into an eight-module system. A stub series terminated logic (SSTL)-like interface is adopted for high-speed signals. From system-level measurements, the data eye width of 600 ps is obtained at a data rate of 600 Mbps. Errorless data transmission is observed in both read and write operations in a bit-error rate testing. The validation system has successfully demonstrated a data-transmission rate of 1.2 GB/s (600 Mbit/s/pin) using source-synchronization and timing vernier techniques at the supply voltage of 2.5 V.

An optical vernier technique for in situ measurement of the length of long Fabry-Pérot cavities

We propose a method for in situ measurement of the length of kilometre-sized Fabry-Pérot cavities in laser gravitational wave detectors. The method is based on the vernier, which occurs naturally when the laser beam incident on the cavity has a sideband. By changing the length of the cavity over several wavelengths we obtain a set of carrier resonances alternating with sideband resonances. From the measurement of the separation between the carrier and a sideband resonance we determine the length of the cavity. We apply the technique to the measurement of the length of a Fabry-Pérot cavity in the Caltech 40m interferometer and discuss the accuracy of the technique.

Precise delay generation using the Vernier technique

The authors show a new technique for generating precise clock delays. The Vernier technique exploits the difference between two coarse delays to achieve delay resolutions much smaller than an intrinsic gate delay. This resolution limit is usually smaller than a conventional gate delay, the limit for most conventional delay generation methods. The Vernier technique has the additional advantage of being easy to implement. Simulations show that this technique is capable of resolutions as small as 50 ps using 2.0 µm CMOS.

Swath bathymetry: principles of operation and an analysis of errors

The principles of swath bathymetry are described, and the main cause of depth error is identified as acoustic interference, particularly from the sea surface. An error analysis is presented which gives the relationship among depth errors, the signal-to-interference ratio, the grazing angle, receiver spacing, and area resolution. It permits a prediction of when its measurement of depth can meet the accuracies required for nautical charting. Ways of reducing multipath interference and of minimizing its effect when it does occur are discussed. Particularly important are area averaging, the use of widely spaced receivers with ambiguities resolved by the vernier technique, and phase tracking for avoiding bias problems.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A compact automatic wavemeter for use with tunable infrared diode lasers

A laser wavemeter based on a fringe-counting Michelson interferometer is described and its use with infrared tunable diode laser (TDL) sources is demonstrated. The wavemeter features compact vacuum-tight construction, the use of a vernier technique to ensure integral fringe counts, and the use of an inexpensive home computer circuit board for direct automatic read-out of the TDL wavenumber or wavelength. The design emphasizes compactness and ease of use at some expense in accuracy, which is limited mainly by TDL alignment and wavefront curvature effects. For routine use in the 5 to 10 μm region, the wavemeter is reliable to about 0.03 cm−1 in unfavorable cases, and a factor of ten better ordinarily. With extra care in alignment of the TDL beam, or with a single “calibration” in a given region, accuracies of 0.001 cm−1 may be obtained (better than 1 part in 106).

Synthetic aperture sonar—Theory and system design

The synthetic‐aperture technique is described and differences between the radar and the sonar implementations of this technique are discussed. Synthetic‐aperture beamforming is discussed and compared to beamforming in a conventional (real aperture) sonar. Sonar performance for the synthetic aperture sonar is compared to that of a conventional sonar with respect to area‐coverage rate, maximum range, and azimuth resolution. The vernier technique for increasing area‐coverage rate and incoherent averaging for reducing image speckle are also discussed.

Millimicrosecond Time-to-Pulse-Height Converter Using an rf Vernier

A time-to-pulse-height converter is described which uses an rf vernier technique to facilitate the timing of an event with respect to the phase of a high-frequency clock. The event starts an oscillator whose frequency differs only slightly from that of the reference clock. The phase of the low-frequency beat note is used as an index of the phase of the clock at the time the event occurred. The system is particularly adaptable to studying fast neutron velocity distributions when the neutron pulses are produced at high repetition rates. It uses a minimum of fast circuit elements, is useful over almost the entire period between pulses at 20 Mc and higher, and gives unambiguous results. The performance with random pulses and with neutron groups has been studied with a 100-channel pulse-height analyzer.