Values Of Parasitic Elements Research Articles

A Large-Signal Monolayer Graphene Field-Effect Transistor Compact Model for RF-Circuit Applications

In this paper, we report a physics-based compact model for monolayer graphene field-effect transistors (m-GFETs) based on the 2-D Density of States of monolayer graphene and the drift-diffusion equation. Furthermore, the Ward-Dutton charge partitioning scheme has been incorporated to the model extending its capabilities to AC and transient simulations. The model has been validated through comparison with DC and RF measurements from two different long-channel m-GFET technologies. Moreover, values of parasitic elements included in the model are extracted from measurements on dedicated test structures and verified through electromagnetic simulations (EM). Finally, an EM-SPICE co-simulation has been carried out to assess the applicability of the developed m-GFET model for the design of “balun” circuits.

Estimation of Parasitic Resistance of Electrolytic Capacitor and Filter Inductor and Prediction of Input Filter Induced Oscillations in a Switch-Mode Magnet Power Supply

In switch-mode power converters with large ratings, it is important to be able to predict the parasitic resistances associated with circuit elements such as electrolytic capacitor and filter inductor in the initial converter design stage itself to avoid the cost and time associated with actual design, prototype fabrication, and testing of these components. Knowing the values of parasitic elements is also important as they decide the possibility of closed-loop instability, besides affecting the other circuit parameters. In this paper, a way to estimate the equivalent series resistance of electrolytic capacitor and the winding resistance of filter inductor is proposed leading to their closed form expressions in terms of system parameters. Using these, procedure to predict the closed-loop instability induced due to the input filter is exemplified with illustrative calculations.

빔공간 MIMO 시스템에 기반한 OFDM 전송방법

Beamspace Multiple-Input Multiple Output(MIMO) system can transmit multiple data by using Electronically Steerable Parasitic Array Radiator(ESPAR) antenna which has single Radio Frequency(RF)-chain. Beamspace MIMO system can reduce complexity of the system and size of antenna in comparison with the conventional MIMO system because of characteristic of ESPAR antenna using the single antenna and the RF-chain. Heretofore, only the research of transmitting single-carrier has been conducted by the use of beamspace MIMO system. Therefore, in this paper, we propose beamspace MIMO system based on Orthogonal Frequency Division Multiplexing(OFDM) for transmitting the multi-carrier and analysis the performance of this system. We find a proper reactance value which has good performance because proposed system changes the performance by the reactance values of parasitic elements. and we confirm that performance of the proposed system is similar to conventional MIMO system based on OFDM. 논문 15-40-03-02 The Journal of Korean Institute of Communications and Information Sciences '15-03 Vol.40 No.03 http://dx.doi.org/10.7840/kics.2015.40.3.425 425 ※ 이 논문은 2012년도 정부(교육과학기술부)의 재원으로 한국연구재단의 지원을 받아 수행된 기초연구사업임(No. 2012017339) 그리 고 이 논문은 2013년도 정부(교육과학기술부)의 재원으로 한국연구재단의 지원을 받아 수행된 기초연구사업임(No.2013R1A2A2A01 005849) 그리고 본 연구는 미래창조과학부 및 정보통신기술진흥센터의 정보통신·방송 연구개발 사업의 일환으로 수행하였음(14-000 -04-001, 고집적 Compact MIMO 안테나 개발). First Author : Smart Radio Research Team, Electronics and Telecommunications Research Institute, jkchoi@etri.re.kr, 정회원 ° Corresponding Author : Department of electronics engineering, Chungbuk National University, ecomm@cbu.ac.kr, 정회원 * Department of electronics engineering, Chungbuk National University, acy890217@naver.com, 학생회원 논문번호:KICS2014-10-438, Received October 30, 2014; Revised March 2, 2015; Accepted March 2, 2015 The Journal of Korean Institute of Communications and Information Sciences '15-03 Vol.40 No.03

ESPAR 안테나를 사용하는 카오스 QPSK 빔 공간 MIMO 시스템을 위한 리액턴스 조합과 성능 평가

Recently, researches about MIMO(Multi-Input Multi-Output) system are being studied actively due to high-capacity and high-speed communication. However, MIMO system has many RF(Radio Frequency) chains according to many array antennas. So, MIMO system has disadvantages such as high-complexity and high-power-consumption. Also, it is impossible to miniaturize the antenna dimension. In order to solve these problems, beamspace MIMO system using ESPAR(Electronically Steerable Parasitic Array Radiator) antenna was proposed. It is possible to reduce the complexity and the power-consumption, because it has single RF chain by using one active antenna and several parasitic elements. In this paper, in order to improve the security, for the first time, chaos communication algorithm is applied to QPSK modulated beamspace MIMO system using ESPAR antenna. We define as chaos QPSK beamspace MIMO system, and evaluate the SER performance. Also, we confirm that QPSK symbols can be made by changing the reactance values of parasitic elements, and evaluate the SER performance of this system.

Boundary Surface of 5-Valued Memory

The subject of research in this paper is multiple-valued (MV) memory cell—particularly the morphology of boundary surface of five-valued memory. By accepting the values of parasitic accumulation elements on the chip, very complicated morphology of the boundary surfaces occurs, which separates various attractors from each other. This is due to the occurrence of undesirable oscillations—a stable limit cycles, which makes it impossible to control memory. These dynamic attractors are so dominant that their regions of attraction even surround regions of attraction of static attractors—required logic levels of memory. Therefore, in the realization of the MV memory on the chip is necessary to know the values of the parasitic elements, because their presence may cause a malfunction of the memory. In this case, only calculation and displaying the boundary surface provides exact answers related to operation of the MV memory.

Modelling of power metal-oxide semiconductor field-effect transistor for the analysis of switching characteristics in half-bridge converters

Considering the power metal-oxide semiconductor field-effect transistor (MOSFET) parasitic elements, the switching characteristics of half-bridge converters are analysed. First, the switching operation process of the converter is discussed, including Cdv/dt induced voltage, turn-on and turn-off transient and drain–source voltage oscillations. Then an analytical model of power MOSFET is deduced and validated. Based on the model and Saber software, the switching characteristics of half-bridge converters are simulated with different values of parasitic elements. Finally, according to the simulation results, the design optimisations are presented, and an experimental prototype is used to validate the proposed approach.

Characterization of parasitics from scattering parameters of laser diode

AbstractA novel method for characterizing the parasitics of parasitic network is proposed based on the relations between the scattering parameters of a semiconductor laser chip and laser diode. Experiments are designed and performed using our method. The analysis results are in good agreement with the measurements. Furthermore, how the parasitics change with the parasitic element values are investigated. The method only needs reflection coefficient of laser diode to be measured, which is simple because of the developed electrical‐domain measurement techniques. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 1–4, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22987

Stability criterion for lateral inhibition and related networks that is robust in the presence of integrated circuit parasitics

In the analog VLSI implementation of neural systems, it is sometimes convenient to build lateral inhibition networks by using a locally connected on-chip resistive grid. A serious problem of unwanted spontaneous oscillation often arises with these circuits and renders them unusable in practice. A design approach is reported that guarantees such a system will be stable, even though the values of designed elements in the resistive grid may be imprecise and the location and values of parasitic elements may be unknown. The method is based on a mathematical analysis using Tellegen's theorem and the Popov criterion. The criteria are local in the sense that no overall analysis of the interconnected system is required for their use, empirical in the sense that they involve only measurable frequency response data on the individual cells, and robust in the sense that they are not affected by unmodeled parasitic resistances and capacitances in the interconnect network.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Criteria for Robust Stability In A Class Of Lateral Inhibition Networks Coupled Through Resistive Grids

In the analog VLSI implementation of neural systems, it is sometimes convenient to build lateral inhibition networks by using a locally connected on-chip resistive grid to interconnect active elements. A serious problem of unwanted spontaneous oscillation often arises with these circuits and renders them unusable in practice. This paper reports on criteria that guarantee these and certain other systems will be stable, even though the values of designed elements in the resistive grid may be imprecise and the location and values of parasitic elements may be unknown. The method is based on a rigorous, somewhat novel mathematical analysis using Tellegen's theorem (Penfield et al. 1970) from electrical circuits and the idea of a Popov multiplier (Vidyasagar 1978; Desoer and Vidya sagar 1975) from control theory. The criteria are local in that no overall analysis of the interconnected system is required for their use, empirical in that they involve only measurable frequency response data on the individual cells, and robust in that they are insensitive to network topology and to unmodelled parasitic resistances and capacitances in the interconnect network. Certain results are robust in the additional sense that specified nonlinear elements in the grid do not affect the stability criteria. The results are designed to be applicable, with further development, to complex and incompletely modeled living neural systems.

Remediable and nonremediable causes of parasitic elements in InP m.e.s.f.e.t.s

Two-dimensional analyses of InP and GaAs m.e.s.f.e.t. structures are used to qualitatively explain relative magnitudes of parasitic element values observed in experimental InP m.e.s.f.e.t.s. Large drain-gate capacitance observed in InP is attributed mainly to substrate conduction, whereas large drain conductance at certain drain biases in InP may be unavoidable due to large velocity dropback and large high-field diffusion in this material. Low Schottky-barrier height and substrate conduction also increase gD

Computer-aided analysis of electronic circuits—the need to include parasitic elements† ‡

Models for the fundamental passive electrical components (R, C, L) which include the dominant parasitic elements are shown. Typical values for the parasitic elements are given. A procedure for using computer-aided design (CAD) simulation programmes such as SPICE 1 to estimate the effects of parasitic elements on electronic circuit performance in the HF/VHF region is described. As an example to demonstrate the usefulness of this procedure a linear model was presented for an audio frequency junction field effect transistor (AF JFET) amplifier suitable for RFI analysis at high frequencies. The CAD simulation and the experimental results for the amplifier voltage transfer ratio in the 0.1 to 100 MHz frequency range were observed to be in good agreement when typical parasitic element values were used. By adjusting the initial (typical) parasitic element values, the agreement between calculated and experimental results can be improved.