Unipolar Stress Research Articles

Degradation of Nonhysteretic Switching in HZO–Al2O3 Stacks Due to Positive Unipolar Stress

Degradation of Nonhysteretic Switching in HZO–Al₂O₃ Stacks Due to Positive Unipolar Stress

Fast and Strong Carbon Nanotube Yarn Artificial Muscles by Electro-osmotic Pump.

Previous electrochemically powered yarn muscles cannot be usefully operated between extreme negative and extreme positive potentials, since generated stresses during anion injection and cation injection partially cancel because they are in the same direction. We here report an ionomer-infiltrated hybrid carbon nanotube (CNT) yarn muscle that shows unipolar stress behavior in the sense that stress generation between extreme potentials is additive, resulting in an enhanced stress generation. Moreover, the stress generated by this muscle unexpectedly increases with the potential scan rate, which contradicts the fact that scan-rate-induced stress decreases for neat CNT muscles. It is revealed by the electro-osmotic pump effect that the effective ion size injected into the muscle increases with an increase in the scan rate. We demonstrate an electrochemically powered gel-elastomer-yarn muscle adhesive that generates and delivers muscle-contraction-mimicking stimulation to a target tissue.

Effects of DC and AC stress on the VT shift of AlGaN/GaN MIS-HEMTs

AlGaN/GaN MIS-HEMTs with adjusted VT were fabricated using a recess gate to investigate the effect on actual operation when the polarity of the gate voltage is opposite in the on- and off-state. The direction and time exponents of VT shift depend on the polarity of the gate bias stress. Electrons detrapping from the Al2O3/AlGaN interface trap site to AlGaN under negative gate bias stress has to overcome the energy barrier, resulting in a higher temperature dependence. In addition, the unaffected gm and SS show that the degradation occurred primarily at the Al2O3/AlGaN interface rather than channel or mobility degradation. For unipolar and bipolar AC stresses, the time exponent of the VT shift during stress time has two values, and a relatively low value during relaxation after bipolar AC stress. These results may be due to the further degradation by Vmin at the broader energy levels of the Al2O3/AlGaN interface.

Frequency and Temperature-Dependent Space Charge Characteristics of a Solid Polymer under Unipolar Electrical Stresses of Different Waveforms.

In this paper, we studied the space charge phenomena of a solid polymer under thermal and electrical stresses with different frequencies and waveforms. By analyzing the parameter selection method of a protection capacitor and resistor, the newly built pulsed electro-acoustic (PEA) system can be used for special electrical stresses under 500 Hz, based on which the charge phenomena are studied in detail under positive and negative DC and half-wave sine and rectangular wave voltages. Experimental results show that the charge accumulated in the polyimide polymer under DC conditions mainly comes from the grounded electrode side, and the amount of charge accumulated with electric field distortion becomes larger in a high-temperature environment. At room temperature, positive charges tend to accumulate in low-frequency conditions under positive rectangular wave voltages, while they easily appear under high-frequency situations of negative ones. In contrast, the maximum electric field distortion and charge accumulation under both half-wave sine voltages occur at 10 Hz. When the measurement temperature increases, the accumulated positive charge decreases, with a more negative charge appearing under rectangular wave voltages, while a more positive charge accumulates at different frequencies of half-wave sine voltages. Therefore, our study of the charge characteristics under different voltage and temperature conditions can provide a reference for applications in the corresponding environments.

Metabolic syndrome in psychiatric outpatients in a tertiary care center in Eastern India

Background: Metabolic syndrome (MS) refers to a clustering of metabolic risk factors and compared to the general population, the prevalence of MS and its components is higher in populations with mental illness across all major diagnostic groups. Aim was to study the prevalence and correlates of MS in a cohort of psychiatric outpatients in a tertiary care centre in Eastern India.Methods: One hundred and sixty-four consecutive patients attending the outpatient service of Department of Psychiatry were recruited. The sociodemographic, clinical and physical activity profile of these patients were recorded by using a proforma specially designed for this purpose. Metabolic syndrome (MS) was diagnosed by the International Diabetic Federation criteria (IDF, 2006).Results: A typical subject was: married (64.6%), male (63.4%) and aged 38.76 years. The most common ICD-10 diagnostic categories were unipolar depression (28%), neurotic, stress related and somatoform disorders (28%), psychoses (21.9%), and bipolar disorder (9.7%). The mean age for onset and duration of illness were 31.65 years and 79 months respectively. The mean number and duration of psychotropic medication received by the subjects were 2.51 and 25.9 months respectively. An IDF criteria-based diagnosis of MS was made in 39% cases. A diagnosis of MS had a significant positive correlation with age, age at onset, duration since onset, number of comorbid medical illness, duration and number of psychotropic medications received, depressive disorders, and BMI.Conclusions: MS is common among subjects with psychiatric disorders and the prevalence of MS in our sample was consistent with the findings reported in literature.

Interface state degradation during AC positive bias temperature instability stress

The reliability of a bulk fin field-effect transistor (FinFET) with a high-k dielectric/metal-gate stack has been investigated by comparing the effects of DC and AC stresses. It is well known that the relaxation during the off-cycle of the AC stress decreases the Vth shift and enhances the device lifetime due to electron detrapping from the high-k dielectric. We found that the relaxation in the interface traps is significantly weaker than that of bulk traps during the unipolar and bipolar AC stresses. The weak recovery is attributed to the concurrent interface state generation during a positive-bias temperature instability (PBTI) stress. Eventually, the interface traps became a major source of the device drift (over 60%) at the high temperature of 400 K. This finding suggests that a new strategy is required to address the PBTI reliability focusing on the residual interface states as well as the bulk trapping, particularly at a high temperature.

Effect of Rising Edge during Dynamic Stress With Duty Ratio in Amorphous InGaZnO Thin Film Transistors

We investigated the effects of rising edge during positive unipolar dynamic stress and bipolar dynamic stress under darkness and illumination with duty ratio D of dynamic stress from 1 to 50%. Threshold voltage shift ${\rm{\Delta}}V_{\rm{th}}$ increased with effective time $t_{\rm{eff}}$ as the product of stress duration and D . ${\rm{\Delta}}V_{\rm{th}}$ was higher during bipolar stress than during positive unipolar stress and under low D than at high D . Degradation of amorphous InGaZnO thin film transistor is related to the number and amplitude of rising edges. We suggest that an additional degradation under dynamic stress is originated from high electric field in channel region at rising edge.

Threshold Voltage Shift Effect of a-Si:H TFTs Under Bipolar Pulse Bias

Threshold voltage shift ( $\Delta V_{\mathrm{ TH}}$ ) effect of hydrogenated amorphous silicon thin-film transistors under bipolar pulse bias stress (BPBS) is investigated. The dependence of the $\Delta V_{\mathrm{ TH}}$ effect on the signal pulsewidth, stress temperature, and negative pulse voltage magnitude of the BPBS is systematically measured, and explained by the charge trapping and detrapping theory. Results show that the BPBS leads to a noticeably suppressed $\Delta V_{\mathrm{ TH}}$ , compared with the conventional unipolar pulse bias stress. It is suggested that the BPBS with proper negative pulse voltage magnitude and low pulse frequency is an effective way of suppressing $\Delta V_{\mathrm{ TH}}$ , especially when the thin-film transistors work relatively at high temperature.

A Study of High-Voltage p-Type MOSFET Degradation Under AC Stress

In this paper, the degradation characteristics of high-voltage (HV) p-type MOSFETs are investigated during negative unipolar ac stress on the gate electrode. The threshold voltage under ac stress is shifted gradually by both the negative-bias temperature-instability mechanism and Fowler-Nordheim degradation. We qualitatively analyze the degradation characteristics of HV p-type MOSFETs under ac stress, and observe the threshold voltage saturation for HV p-type MOSFETs at long ac stress. Based on the effects of temperature and duty cycles, we offer a suitable model of degradation saturation after long ac stress, which is caused by interface trap saturation and recovery during pulse delay timing, which is dependent on thermal activation energy.

(Invited) Threshold Voltage Stability Comparison of Commercial SiC Mosfets and Related Issues

Silicon-Carbide (SiC) MOSFETs are beginning to gain wide acceptance for power electronics applications requiring high efficiency and high operational temperatures. There is a growing number of commercial offerings at 1200 V from different manufacturers that may have very distinctive processes that need to be evaluated in a consistent manner to make valid comparisons. As SiC MOSFET technology continues to mature, device performance and reliability should also improve. In recent years, a diverse number of publications in the literature have addressed the poor quality of the MOS gate dielectric layer, and the challenges related to charging of both interface defects and near-interfacial oxide defects during electrical and thermal stressing. A significant number of intrinsic defects in the gate oxide result from growth of the dielectric layer itself. Subsequent process steps can activate a number of these defects which can trap charge during electrical gate-stress, thereby altering the device threshold voltage. During bias temperature stressing, activation of additional oxide defects can occur, which gives rise to larger threshold voltage instabilities. The stability of the MOS threshold voltage under electrical gate-stress at high temperature is an important reliability phenomenon with potential application relevance. A large positive shift reduces on-state conduction, increases power losses, and may reduce efficiency in switch-mode converter applications. A large negative shift in the threshold voltage is a more serious reliability concern because of excessive drain leakage current in the MOS-channel during the off-state. This effect will limit blocking capability and possibly lead to device failure. This work will provide an overview of threshold voltage stability issues in commercially-available SiC MOSFETs subject to both positive and negative gate-stress at high temperature. Figure 1 is a plot of the subthreshold-voltage shift as a function of unipolar (positive) bias stress time for commercial devices purchased between 2012 and 2015. Recent devices show significant improvement in threshold voltage shift for a +25 V gate-bias stress at 175 °C. The older commercial devices shift considerably more, with the onset of degradation occurring much earlier in time. We have also observed differences in the responses of devices from different manufactures for similar stress and test conditions. It is expected that process differences among device manufacturers would in turn, result in differences in the bias-temperature-stress responses. A fuller discussion of these test results and related issues will be presented in the final paper. Figure 1

Effect of Rising Edge in Dynamic Stress with Various Duty Ratio in Amorphous Ingazno Thin Film Transistor

Recently, many research explains the positive threshold voltage (V th ) shift of oxide TFT as charge trapping at gate dielectric or interface of gate dielectric and channel layer. But mechanism of degradation of rising edge of dynamic stress has not been explained exactly. During all stresses, gate stress of 1 Hz with 50%, 20%, 10% and 1% duty ratio was applied at 120 ℃ and both drain voltage and source voltage were grounded. Gate voltage (VG ) was on-voltage (Von ) of 20 V and off-voltage (Voff ) of 0 V in unipolar positive stress, Von of 0 V and Voff of -20 V in unipolar negative stress, and Von of 20 V and Voff of -20 V in bipolar stress (Fig.1). During illumination, samples were illuminated using a top LED. We defined Vth as gate voltage at 1 nA of drain current ID at VDS of 15V. We defined effective time as sum of Von time in all stress including illumination Fig. 2 shows the ΔVth as function of time with 50%, 20% 10% and 1% duty ratio. In dark, positive unipolar gate stress was applied in fig. 2(a) and bipolar gate stress was applied in fig. 2(b). In illumination, positive unipolar gate stress was applied in fig. 2(c) and bipolar gate stress was applied in fig. 2(d). Fig. 3 shows the ΔVth at effective time of 2000s as reciprocal function of duty ratio for positive unipolar gate stress and bipolar gate stress. At same effective stress time, ΔVth was increase with decreasing duty ratio and ΔVth was larger in bipolar gate stress than in unipolar positive gate stress. Fig. 4 shows ΔVth at effective time of 2000s as reciprocal function of duty ratio under positive unipolar gate stress for illumination and dark. In dark, higher ΔVth was observed compared with illumination. In this study, we investigated relationship of ΔVth with various bias stress condition including positive unipolar, negative unipolar and bipolar gate stress and ambient including dark and illumination. We will explain positive bias temperature stress based on charge trapping and introduce new mechanism of additional positive ΔVth on rising edge of dynamic stress. Figure 1

Depression, anxiety and stress among pregnant migraineurs in a pacific-northwest cohort

BackgroundThe co-occurrence of migraine and unipolar psychiatric disorders has been well documented in non-pregnant populations, however little is known in pregnant populations. MethodsA cohort of 1321 women was interviewed during the first trimester of pregnancy. At the time of interview lifetime migraine status was ascertained using International Classification of Headache Disorders diagnostic criteria (ICHD-II). Information regarding unipolar depression, anxiety and stress during pregnancy was collected using the Patient Health Questionnaire Depression Module-9 (PHQ-9), and the Depression Anxiety Stress Scales 21-item Short Form (DASS-21). Multivariable logistic regression procedures were used to estimate odds ratios (ORs) and 95% confidence intervals (CIs) for the association of migraine and mood disorders during pregnancy. ResultsApproximately 28.2% (N=372) were classified as having a lifetime history of migraine; among migraineurs 122 were classified as migraineurs with aura and 250 as migraineurs without aura. Compared with non-migraineurs, migraineurs were associated with 1.60-fold increased odds of depression as measured by a PHQ-9 score ≥10 (AOR=1.60; 95% CI: 1.12–2.31). Overall, migraine with aura was more strongly associated with depression than was migraine without aura. Migraineurs, as compared with non-migraineurs, also had higher odds of mood disorders as measured by the DASS-21. ConclusionsThe comorbidity of mood and migraine disorders in pregnant populations supports the need for integrated mental and physical clinical evaluation, increased vigilance, and treatment of patients with such disorders.

Stress, temperature and electric field effects in the lead-free (Ba,Ca)(Ti,Zr)O3 piezoelectric system

The large signal strain response as a function of uniaxial compressive stress, electric field and temperature is investigated for compositions across the morphotropic phase boundary in the (Ba,Ca)(Ti,Zr)O3 ferroelectric system. The largest piezoelectric coefficient in terms of unipolar strain divided by the maximum applied field, Su/Emax, is 1540pmV−1, which clearly exceeds the piezoelectric response of most lead zirconate titanate materials. The extraordinarily large piezoelectric properties occur in the vicinity of the morphotropic phase boundary region on the rhombohedral side of the phase diagram. In this material, an electric threshold field is observed that is required to overcome the stress-induced domain clamping and obtain a measurable strain response. Moreover, the study reveals that careful selection of composition, stress and field amplitude allow for large signal piezoelectric coefficients of over 740pmV−1 in the temperature range of 25–75°C. The extraordinarily large unipolar strain response can be assigned to an electric field-controlled regime, in which the unipolar compressive stress induces non-180° domain switching perpendicular to the applied electric field. During electrical loading, the electric field can realign these domains back into the parallel direction, maximizing non-180° domain switching and enhancing unipolar strain.

Physical, Electrical, and Reliability Characteristics of Multi-Step Deposition-Annealed HfO2 Film

The physical, electrical, and reliability characteristics of the HfO2 gate dielectrics that were fabricated by a single-step and a multi-step deposition-annealing method are compared in this study. After annealing at 750°C, the single-step annealed HfO2 film has transformed into the polycrystalline phase, whereas the multi-step annealed HfO2 film is found to remain in a nanocrystalline phase. Additionally, the density and composition of the HfO2 dielectric films are enhanced by multi-step deposition-annealing process. These changes result in an improvement in the electrical characteristics, breakdown voltage, and reliability for the multi-step deposition-annealed HfO2 film, revealing that the multi-step deposition-annealing method is a promising means for improving the thermal stability and reliability of HfO2 gate dielectrics. In addition to static stress (DC) evaluation, the reliability characteristics of multi-step deposition-annealed HfO2 dielectrics under unipolar and bipolar stresses were also examined. The dielectric breakdown failure time under bipolar stress is longer than those under the other two stress methods. Moreover, as the number of deposition-annealing steps increases, the lifetime enhancement is reduced. However, the failure time is still longer than that of the single-step annealed HfO2 film.

Time-dependent dielectric breakdown (TDDB) distribution in n-MOSFET with HfSiON gate dielectrics under DC and AC stressing

This paper discusses time-dependent dielectric breakdown (TDDB) in n-FETs with HfSiON gate stacks under various stress conditions. It was found that the slope of Weibull distribution of Tbd, Weibull β, changes with stress conditions, namely, DC stress, unipolar AC stress and bipolar AC stresses. On the other hand, the time evolution component of stress-induced leakage current (SILC) was not changed by these stresses. These experimental results indicate that the modulation of electron trapping/de-trapping and hole trapping/de-trapping by stress condition changes the defect size in high-k gate dielectrics. Therefore, the control of injected carrier and the characteristics of trapping can provide the steep Weibull distribution of Tbd, leading to long-term reliability in scaled CMOS devices with high-k gate stacks.

Comprehensive comparison of structural, electrical, and reliability characteristics of HfO2 gate dielectric with H2O or O3 oxidant

The growth, composition, electrical characteristics, and reliability performance of high-k HfO2 dielectric films that were deposited by an atomic layer deposition technique are studied. The films were grown using tetrakis(ethylmethylamino)hafnium precursor and either H2O or ozone (O3) as the oxidant. When H2O was the oxidant, the resulting HfO2 film had a thinner interfacial layer than that obtained using the O3 oxidant, but the bulk HfO2 layer was of a poorer quality. Of the annealed HfO2 films with a comparable equivalent oxide thickness, the O3 oxidant-based HfO2 films had better electrical properties and reliability. The oxide charge density, the hysteresis, the leakage current, the breakdown electrical field, and the time to dielectric breakdown of the HfO2 film that was deposited with O3 oxidant were all better those of the film that was deposited with H2O oxidant. Additionally, the dynamic stress, including unipolar and bipolar stresses, increases the times to dielectric breakdown for both HfO2 films. However, the increase under bipolar stress was greater for the HfO2 films that were grown using the H2O oxidant because more detrapping occurred.

Characterization of Al2O3–HfO2–Al2O3 sandwiched MIM capacitor under DC and AC stresses

In this paper, electrical properties and reliability of high capacitance density Metal–Insulator–Metal (MIM) capacitor with sandwiched hafnium-based dielectric is analyzed using three kinds of voltage stress; constant voltage stress (CVS), unipolar voltage and bipolar voltage stresses. The fabricated MIM capacitor shows not only high capacitance density but also low leakage current density of about ∼10nA/cm2 at room temperature and 1V. The relative variation of capacitance (ΔC/C0) increases and the variation of voltage linearity (α/α0) gradually decreases with stress-time due to the charge trapping effect in the high-k dielectric. The relative variations of capacitance and voltage linearity show the greater change by the bipolar voltage stress than CVS and unipolar voltage stresses.

Experimental characterization and modelling of electromigration lifetime under unipolar pulsed current stress

The electromigration behaviour of Cu/SiCOH interconnects carrying unipolar pulsed current with long periods (i.e. 2, 16, 32 and 48h) is presented in this study. Experimental observations suggest that the electromigration behaviour during void growth can be described by the ON-time model and that the lifetime of the Cu/SiCOH interconnects is inversely related to the duty cycle. Numerical simulation is carried out to compute the time required to nucleate a void under unipolar pulsed current stress conditions. The time to void nucleation is found to vary proportionally to the inverse square of the duty cycle and is independent of frequency at 1Hz and higher. By computing the stress evolution in interconnects with short length, it was shown that the product of the unipolar pulsed current’s duty cycle and current density, i.e. average current density, is equivalent to the current density of a constant current (D.C.) stress. The simulation results suggest (d·jL)crit as the equivalent critical current density-length product under unipolar pulsed current condition. Both the experimental and simulation results show that duty cycle has an effect on the electromigration lifetime of interconnects carrying unipolar pulsed current.

CS03-03 - Allele-specific epigenetic changes: molecular mediators of gene x environment interactions in mood and anxiety disorders?

Family, twin and epidemiological studies all indicate the importance of both genetic as well as environmental risk factor for mood and anxiety disorders, especially unipolar depression and posttraumatic stress disorder (PTSD). In this talk, I will try to illustrate examples of the interplay between genes and stressful early environment for these disorders. I will highlight the identification of potential molecular mechanisms, including allele-specific epigenetics, of such interactions for the glucocorticoid-receptor co-chaperone gene FKBP5 as an example. Finally, I will present data on the potential usefulness of genome-wide expression quantitative trait data and genome-wide DNA methylation data to identify novel targets for gene x environment interaction in stress and trauma-related psychiatric disorders.

A finite weakest-link model of lifetime distribution of high- k gate dielectrics under unipolar AC voltage stress

This paper presents a new probability distribution function for the breakdown lifetime of high- k gate dielectrics under unipolar AC voltage stress. This function is derived from a finite weakest-link model, where the gate oxide layer is considered to consist of many potential breakdown cells. Each potential breakdown cell is modeled as a series coupling of several subcells, which is analogous to the fiber-bundle model for the strength statistics of structures. The present model indicates that the type of lifetime distribution varies with the gate area and the dependence of the mean lifetime on the gate area deviates from the classical Weibull scaling law. It is shown that the model agrees well with the observed lifetime histograms of HfO 2 based gate dielectrics under unipolar AC voltage stress.