Unequal Error Correction Research Articles

Realizing Unequal Error Correction for nand Flash Memory at Minimal Read Latency Overhead

In nand Flash memory, all pages have the same storage capacity and hence accommodate the same amount of redundancy in support of error correction. In current practice, user data in all the pages are protected by the same error correction code. However, different types of pages in multibit per cell memory have largely different bit error rates, for which appropriate unequal error correction can achieve a better utilization of memory redundancy and hence improve program/erase (P/E) cycling endurance. Nevertheless, a straightforward realization of unequal error correction suffers from severe memory read latency penalty. This brief presents a design strategy to implement unequal error correction through concatenated coding, which can well match the unequal error rates among different types of pages at minimal memory read latency penalty. Based on measurement results from commercial sub-22-nm 2 bits/cell nand Flash memory chips, we carried out simulations from both the coding and storage system perspectives, and the results show that this design strategy can improve the P/E cycling endurance by 20% and only incur less than 7% increase of storage system read response time at the end of Flash memory lifetime with the P/E cycling of around 1800.

Unequal error correction strategy for magnetic recording systems with multi-track processing

In multi-track detection, the simultaneous recovery of user data of all tracks is obtained from multi-head or single-head reader with buffer. Due to incomplete inter-track interference (ITI) information of the outer tracks, unequal error rates exist among tracks. For a system with three-track processing, the center track exhibits a better performance than the others. In this work, we propose the unequal error protection (UEP) schemes to improve the overall system performance of a 2-D interference bit-patterned recording system with multi-track detection. The performances of the proposed schemes are investigated for the BPM channels with and without the media noise. Based on the simulation results, the proposed schemes offer the gain of about 0.2–0.3 dB over the equal error protection (EEP) scheme at a bit error rate of 10−4.

Cyclic unequal error protection codes constructed from cyclic codes of composite length

The unequal error correction capabilities of binary cyclic codes of composite length are investigated. Under certain conditions, direct sums of concatenated codes have unequal error correction capabilities. By a modified Hartmann and Tzeng (1973) algorithm, it is shown that a binary cyclic code of composite length is equivalent to the direct sum of concatenated codes. With this, some binary cyclic unequal error protection (UEP) codes are constructed. Finally, the authors present a class of two-level UEP cyclic direct-sum codes which provide error correction capabilities higher than those guaranteed by the Blokh-Zyablov (1974) constructions. >