Ultrathin Region Research Articles

Emergence of ferroelectricity in ZrO2 thin films on TiN/Si featuring high temperature sputtering method

ZrO2 has attracted attention as HfO2 and Hf1−xZrxO2 to nonvolatile memory applications because of its ferroelectric nature in orthorhombic phase, lower cost, and excellent thermal stability. Ferroelectricity in ZrO2 has been reported experimentally using several deposition methods. However, the fabrication of a ferroelectric ZrO2 thin film in the ultra-thin region of below 5 nm on TiN/Si remains a challenge. In this study, we examined the formation of ferroelectric ZrO2 ultrathin films on TiN/p+-Si using a high-temperature sputtering method while optimizing the involved substrates and processes.We clarified the importance of the underlying substrate selection to control the crystalline phase of ZrO2 thin films through comparing several types of substrates. TiN/p+-Si was found to be the most appropriate substrate for realizing ferroelectric ZrO2 films. Further, we demonstrated that plasma oxidation treatment improves the ferroelectricity and reduces the leakage current component of the 11-nm-thick ZrO2 films. Subsequently, we discussed the conditions for ferroelectricity by summarizing the switching polarization (PSW) of ZrO2 as functions of the ZrO2 thickness and sputtering temperature and realized the appearance of ferroelectricity in a 4 nm thick ZrO2 film with a PSW of 0.53 μC/cm2 and endurance properties until ∼108 cycles.

Quasi-in-situ observation of the grain growth and grain boundary movement in sintered Cu nanoparticle interconnects

Sintered Cu interconnection for power electronics has attracted considerable interest recently. Investigation of grain growth during Cu nanoparticle sintering provides insight into the strengthening mechanism of the sintered structure. Currently, the literature on Cu nanoparticle sintering mechanism is limited and mainly focuses on the transmission electron microscopy (TEM) observation of a limited number of nanoparticles with an ultrathin region. This study employs a quasi-in-situ method to investigate the mechanism of grain growth and twin formation in the bulk sintered Cu nanoparticle structure. The grains were found to continuously grow accompanied by orientation unification which is attributed to grain boundary (GB) migration or dislocation motion at elevated temperature. Two mechanisms governing twin formation have been observed and detailed. The grain and pore size and porosity in the sintered Cu structure under different sintering conditions were measured and correlated to the joint strength. Porosity was found to be the dominant factor affecting joint strength rather than grain or pore size. The original bonding interface between the sintered structure and the Cu substrate has high porosity. However, subsequent GB movement during heating causes this interface to shift into the sintered structure, eliminating the high porosity interface. Meanwhile, a model predicting porosity evolution was used to identify the dominant diffusion mechanism. This study constitutes the first detailed experimental observation of nanoscale grain growth, twin formation and GB movement at the interface and in the bulk sintered Cu structure. This novel mechanism of GB shifting could provide new guidance for strengthening the sintered Cu interconnections for power electronics.

Performance analysis of ITCs on analog/RF, linearity and reliability performance metrics of tunnel FET with ultra-thin source region

Performance analysis of ITCs on analog/RF, linearity and reliability performance metrics of tunnel FET with ultra-thin source region

High Electric Field Sensing in Ultrathin SiO₂ and Tunnel Region to Enhance GaInP/Si Dual Junction Solar Cell Performance

The Si material is widely used by the manufacturers for sensing applications, because of its abundance. Better carrier sensing capability provide high performance. Solar cell is a sensor, which can sense the sun spectrum to convert it into electrical energy. This paper presents enhancement of passivation quality of GaInP/Si dual junction solar cell by enhancing the carrier transport through tunnel oxide. Reducing the SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> thickness increases the transport channel, thereby increasing the electric filed. This enhanced electric field accelerates the carrier transport in the passivation layer, and ultimately the passivation quality improves due to enhanced carries. The high electric field sensing accelerates the majority carriers towards the rear surface. Here, the improvement of the passivation quality is achieved via scaling down the oxide thickness as explained in the MIS tunneling theory. Reduction in oxide thickness provide more transport channels for the carriers, hence improves the tunneling process. Improved carrier sensing in 300nm-1100nm wavelength range, can progress towards the thermodynamic limit of open circuit voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\textit {oc}}$ </tex-math></inline-formula> ). Also, we have used a wide-bandgap tunnel junction to electrically connect two cells, to see the effect on spectrum loss. The thickness and doping concentration of the tunnel junction plays very important role in tunneling process. Sharp edges and fast tunneling of the tunnel junction is the key element in proper current matching process. Numerical analysis of tunnel oxide thickness variation and wide-bandgap tunnel junction is done to obtain the optimum efficiency of 36.22% under 1-Sun concentration.

Ultrasensitive terahertz sensing with broadside coupled polarization insensitive graphene metamaterial cavities

The ubiquitous property of metamaterials to confine energy at deep-subwavelength scale paves the way to leverage strong light (or terahertz)-matter interactions towards the development of efficient, state-of-the-art sensing technologies at the terahertz (THz) frequencies. In two-dimensional active metamaterials, for instance, graphene metasurfaces; THz-matter interactions are largely governed by the near-field coupling, where strong field confinement is predominantly achieved within very small areas (compared to total device area), viz, in split gaps, narrow apertures etc. Here, we demonstrate a polarization insensitive broadside coupling mechanism in graphene- metamaterials, which is beneficial for realization of miniaturized, compact, ultra-sensitive THz thin film sensors with substantially large effective areas for strong THz-matter interaction. Proposed structure entails ultrathin layer of dielectric spacer (cavity) sandwiched between two “plus” shaped sub-wavelength graphene resonators. In order to investigate the sensing capabilities, obscure materials are placed in ultrathin cavity region to detect its refractive indices. A record high refractive index sensitivity of around 2.8 THz/RIU substantiates the utility of introducing the concept of broadside coupling in graphene metamaterials. Further, we employ the Lorentz oscillator based coupled mode theory in order to elucidate the numerical outcomes.

Impact of temperature on analog/RF, linearity and reliability performance metrics of tunnel FET with ultra-thin source region

Impact of temperature on analog/RF, linearity and reliability performance metrics of tunnel FET with ultra-thin source region

Enhanced Metal-Insulator Transition in Freestanding VO2 Down to 5 nm Thickness.

Ultrathin freestanding membranes with a pronounced metal-insulator transition (MIT) have huge potential for future flexible electronic applications as well as provide a unique aspect for the study of lattice-electron interplay. However, the reduction of the thickness to an ultrathin region (a few nm) is typically detrimental to the MIT in epitaxial films, and even catastrophic for their freestanding form. Here, we report an enhanced MIT in VO2-based freestanding membranes, with a lateral size up to millimeters and the VO2 thickness down to 5 nm. The VO2 membranes were detached by dissolving a Sr3Al2O6 sacrificial layer between the VO2 thin film and the c-Al2O3(0001) substrate, allowing the transfer onto arbitrary surfaces. Furthermore, the MIT in the VO2 membrane was greatly enhanced by inserting an intermediate Al2O3 buffer layer. In comparison with the best available ultrathin VO2 membranes, the enhancement of MIT is over 400% at a 5 nm VO2 thickness and more than 1 order of magnitude for VO2 above 10 nm. Our study widens the spectrum of functionality in ultrathin and large-scale membranes and enables the potential integration of MIT into flexible electronics and photonics.

Electrical Analysis and Comparison of Ta2O5 Tunneling Oxide with SiO2 in Passivated c-Si Solar Cell

The Tantalum oxide material (Ta2O5) as tunnel oxide in comparison with the Silicon dioxide (SiO2) Tunnel oxide is proposed. The lower bandgap and high refractive index of Ta2O5 has several advantages over SiO2. The Ta2O5 is used as Anti-Reflecting coating earlier, but also has capability to behave as the tunneling oxide. In the ultrathin region, the Tantalum oxide (Ta2O5) potentially produces extremely high tunneling and high electric field. The greater electrical intensity increases both the transportation of carrier and passivation quality of designed c-Si structure. The carrier selectivity is also increased due to very high capacitive nature. The performance measurement is done in ASTM certified AM1.5G environment using Silvaco ATLAS 2D TCAD tool. The comparison has been made between Ta2O5 and SiO2, to show the advantage of Ta2O5 over SiO2. The lower bandgap of 4.8eV and higher affinity of 3.19 of Ta2O5 as compared to SiO2 proves to be better material as tunneling oxide. The bandgap and electric field region of both the materials have been studied. In first approach to use Ta2O5 as tunneling oxide, the power conversion 28.42% is obtained for 0.1nm thickness of the Ta2O5. External and internal quantum efficiencies are well above 80% and 90% respectively. The characteristics of the Ta2O5 tunneling based solar cell are compared with the previous reported solar cell.

Single-Molecule Fluorescence Microscopy for Probing the Electrochemical Interface.

The electrochemical interface is an ultrathin interfacial region between the electrode and solution where electrochemical reactions occur. The study of the electrochemical interface continues to be one of the most exciting directions in modern electrochemistry research. Much of our existing knowledge about the electrochemical interface comes from ensemble measurements and ex situ imaging of the electrode surface. Due to its enormous complexity and highly dynamic nature, however, new imaging tools that can probe the interface in situ with ultrahigh spatial and temporal resolution and single-molecule sensitivity are apparently needed. Single-molecule fluorescence microscopy (SMFM) has emerged as a powerful tool that is uniquely suited for studying the electrochemical interface. In this mini-review, we first give a brief overview of various existing SMFM methods for studying electrochemical problems. We then discuss several exciting research topics involving the use of SMFM methods for studying surface-immobilized molecules, single freely diffusing molecules, single molecules as catalytic reaction indicators, and single-molecule labeling and imaging of interfacial nanobubbles. We anticipate that we will continue to see a rapid increase in publications on stochastic electrochemistry of single molecules and nanoparticles. The increased use of SMFM will likely bring new information to our study of the electrochemical interface.

New aspects of improving the performance of WO3 thin films for photoelectrochemical water splitting by tuning the ultrathin depletion region.

In this work, we explored a facile, scalable and effective method for substantially enhancing photocurrent and incident-photon-to-current efficiency of WO3 thin-film photoanodes by a mild reduction treatment under low oxygen pressure. Experimental data from photoelectrochemical and electrochemical impedance spectroscopies have shown that such treatment can increase the charge carrier density on WO3 photoanode surfaces resulting in improvements in hole collection efficiency and reduction in charge recombination. Despite a much thinner layer of WO3 (about 500 nm) compared to those in other published studies, the electrodes exhibited an ultra-high photocurrent density of 1.81 mA cm−2 at 1.23 V vs. RHE. This current density is one of the highest ones among WO3-based photoanodes described in literature. The proposed surface modulation approach offers an effective and scalable method to prepare high-performance thin film photoanodes for photoelectrochemical water splitting.

An Explicit Unified Drain Current Model for Silicon-Nanotube-Based Ultrathin Double Gate-All-Around &lt;sc&gt; mosfet&lt;/sc&gt;s

A unified drain current model for silicon-nanotube-based ultra-thin double gate-all-around (DGAA) mosfet is presented in this work. Physics-based, analytical expressions for surface potential and charge density are derived utilizing Fermi-Dirac statistic, one-dimensional density of states (DOS) and Gauss’ law in the ultrathin channel region of the device. Using the derived expressions of surface potential and charge density, a closed-form expression for the drain current under drift-diffusive transport regime is formulated within the purview of gradual channel approximation. The proposed drain current model takes account for two-dimensional carriers’ confinement, which becomes prominent in ultrathin channel devices. The derived model, which is valid for all regions of operation, provides a physics-based description of the surface potential, charge density, and drain current. Output and transfer characteristics of the proposed drain current model have been verified by comparing against results obtained from the three-dimensional numerical simulator for different device parameters. The performance of the proposed drain current model has been further validated with the data presented in reported results. The present drain current model is explicit, analytical, and does not employ any numerical schemes and thus can be readily used in the efficient exploration of any circuit design and simulations.

Evolution of ferroelectric HfO2 in ultrathin region down to 3 nm

The ferroelectric properties of ultrathin Y-doped HfO2 films were investigated. Ferroelectricity was demonstrated experimentally in 3 nm-thick Y-doped HfO2 via direct detection of displacement currents during polarization switching. The dependence on the HfO2 thickness within the 30 to 3 nm range revealed that the ferroelectric properties decrease rapidly below a critical thickness. In the ultrathin HfO2 region, methods such as higher Y doping or metal capping annealing were required to further stabilize the ferroelectric phase. These methods could be used to enhance the switchable polarization (Psw) to 35 μC/cm2 in 5 nm- and 10 μC/cm2 in 3 nm-thick Y-doped HfO2. This paper indicates that HfO2 ferroelectricity is scalable even in the ultrathin region.

Layer-by-layer engineering of two-dimensional perovskite nanosheets for tailored microwave dielectrics

We report an approach for constructing ultrathin microwave dielectrics using two-dimensional (2D) perovskite nanosheets (Ca2Nb3O10). The solution-based layer-by-layer assembly of Ca2Nb3O10 nanosheets enables the tailoring of dielectric responses and breakdown voltage in order to realize miniaturized capacitors with improved performances. Multilayer stacked nanosheet films showed a stable dielectric response of up to 10 GHz; the dielectric constant of ∼200 is the highest among high-κ perovskites in the ultrathin region (<30 nm). Moreover, the nanosheet films realized a high capacitance density (∼20 µF/cm2) with a robust thermal stability up to 250 °C. These superior dielectric properties of perovskite nanosheets offer a new solution for high-performance microwave devices.

Imaging Dynamic Collision and Oxidation of Single Silver Nanoparticles at the Electrode/Solution Interface.

The electrochemical interface is an ultrathin interfacial region between the electrode surface and the electrolyte solution and is often characterized by numerous dynamic processes, such as solvation and desolvation, heterogeneous electron transfer, molecular adsorption and desorption, diffusion, and surface rearrangement. Many of these processes are driven and modulated by the presence of a large interfacial potential gradient. The study and better understanding of the electrochemical interface is important for designing better electrochemical systems where their applications may include batteries, fuel cells, electrocatalytic water splitting, corrosion protection, and electroplating. This, however, has proved to be a challenging analytical task due to the ultracompact and dynamic evolving nature of the electrochemical interface. Here, we describe the use of an electrochemical nanocell to image the dynamic collision and oxidation process of single silver nanoparticles at the surface of a platinum nanoelectrode. A nanocell is prepared by depositing a platinum nanoparticle at the tip of a quartz nanopipette forming a bipolar nanoelectrode. The compact size of the nanocell confines the motion of the silver nanoparticle in a 1-D space. The highly dynamic process of nanoparticle collision and oxidation is imaged by single-particle fluorescence microscopy. Our results demonstrate that silver nanoparticle collision and oxidation is highly dynamic and likely controlled by a strong electrostatic effect at the electrode/solution interface. We believe that the use of a platinum nanocell and single molecule/nanoparticle fluorescence microscopy can be extended to other systems to yield highly dynamic information about the electrochemical interface.

Atomic Layer Engineering of High-κ Ferroelectricity in 2D Perovskites.

Complex perovskite oxides offer tremendous potential for controlling their rich variety of electronic properties, including high-TC superconductivity, high-κ ferroelectricity, and quantum magnetism. Atomic-scale control of these intriguing properties in ultrathin perovskites is an important challenge for exploring new physics and device functionality at atomic dimensions. Here, we demonstrate atomic-scale engineering of dielectric responses using two-dimensional (2D) homologous perovskite nanosheets (Ca2Nam-3NbmO3m+1; m = 3-6). In this homologous 2D material, the thickness of the perovskite layers can be incrementally controlled by changing m, and such atomic layer engineering enhances the high-κ dielectric response and local ferroelectric instability. The end member (m = 6) attains a high dielectric constant of ∼470, which is the highest among all known dielectrics in the ultrathin region (<10 nm). These results provide a new strategy for achieving high-κ ferroelectrics for use in ultrascaled high-density capacitors and post-graphene technology.

Analytical modeling of subthreshold characteristics of ultra-thin double gate-all-around (DGAA) MOSFETs incorporating quantum confinement effects

In this work, analytical models of subthreshold current and subthreshold swing of short channel ultra-thin double gate-all-around (DGAA) MOSFETs including quantum confinement effects have been proposed. The subthreshold current model is presented using Pao-Sah's double integration formula accounting both drift and diffusion components of the current. Quantum effects arising due to 2-D carrier confinement are incorporated in the model to consider the effective carrier density reduction in ultra-thin channel region. A detailed analysis of charge density calculation using density of states (DOS) method is also done. Further, the virtual-cathode potential has been utilised to model the subthreshold swing of the device. The effect of device design parameters like channel thickness, oxide thickness, gate length etc. on subthreshold characteristics has been extensively studied. The model results have been verified by comparing it with the numerical simulation data obtained from 3D device simulator Visual TCAD of Cogenda Int.

A Spectrally Tunable Plasmonic Photosensor with an Ultrathin Semiconductor Region

Surface plasmon resonance (SPR) has been widely utilized to improve the absorption performance in the photosensors. Graphene has emerged as a promising plasmonic material, which supports tunable SPR and shows significant flexibility over metals. In this letter, a hybrid photosensor based on the integration of periodic cross-shaped graphene arrays with an ultrathin light-absorbing semiconductor is proposed. A tenfold absorption enhancement over a large range of the incidence angle for both light polarizations as well as a considerably high photogeneration rate ($\sim10^{37}$) is demonstrated at the resonance. Compared with traditional metal-based plasmon-enhanced photosensors, the absorption enhancement here can be expediently tuned with manipulating the Fermi energy of graphene. The proposed photosensor can amplify the photoresponse to the incidence light at the selected wavelength and thus be utilized in photosensing with high efficiency and tunable spectral selectivity in the mid-infrared (mid-IR) and terahertz (THz) regime.

Heated Ion Implantation Technology for High Performance Metal-Gate/High-k CMOS SOI Finfets

1. Introduction Thinning of the fin channel is a key technology for CMOS FinFET scaling. For sub-14nm- node FinFETs, the fin channel becomes thinner than 10 nm. Furthermore, lowering of the sheet resistance (Rs) in the source/drain extension (SDE) is essential for performance improvement [1]. However, in the case of conventional I/I, it is difficult to reduce Rs because conventional I/I generally causes poly-crystallization and/or crystal defects to be formed in ultrathin fin region, even after activation annealing [2, 3]. This problem is particularly severe for SOI FinFETs. Recently, a novel I/I technology called heated I/I has been proposed. By using the heated I/I technology, the crystallinity of the implanted layer for Si is maintained during heated I/I, and defect-free crystal can be realized by activation annealing [4, 5]. Furthermore, it has been reported that the Ion-Ioffcharacteristics are improved in bulk Si-channel nMOS FinFETs by heated I/I [6]. In this paper, we report heated I/I technology for high-performance metal-gate/high-k CMOS SOI FinFETs. 2. Experimental Both nMOS and pMOS SOI FinFETs were fabricated. (110) fin channel was formed on (100) SOI substrate. Doped-poly-Si/TiN/HfO2/SiO2 gate stacks were formed, patterned, and etched. SDE was formed by room temperature (RT) or 500oC I/I. As+ or BF2 + was implanted at 5keV with total doses of 2x1015cm-2. RTA was performed at 915oC for 2s. Finally, the back-end process was carried out. 3. Results and Discussion To understand the crystal condition in the ultrathin fin region after heated I/I, we investigated the crystallinity of the SOI layer after RT and heated I/I by cross-sectional TEM observation (Figs. 1 and 2). The I/I was performed under the same conditions as those for the SDE formation in FinFETs (Figs. 1(a) and 2(a)). In the case of RT I/I, the SOI layer is fully amorphized by I/I (Fig. 1(b)), and polycrystals and twins are observed even after annealing (Fig. 1(c)). Since there are no seed crystals in the SOI layer after I/I, the implanted region cannot be crystallized by activation annealing. On the other hand, in the case of heated I/I, the crystallinity is maintained in the SOI layer after I/I (Fig. 2(b)). The crystal perfectly recovers by activation annealing (Fig. 2(c)). These results indicate that the defect-free SDE can be formed in ultrathin fin region by heated I/I. We investigated the impact of heated I/I on the SOI FinFET performance. Figures 3 (a) and (b) show the Ion distribution in the nMOS and pMOS FinFETs, respectively, processed by RT or heated ion implantation. For the nMOS FinFETs, the 50% Ion value of heated I/I is about 7% higher than that of RT I/I. Also, for the pMOS FinFETs, the 50% Ion value in the case of heated I/I is about 1.5% higher. The resistance (Rsd) of the SDE becomes lower in the case of heated I/I (Fig. 4), owing to perfect crystal recover [7]. This is the main reason for the improvement in Ionby heated I/I. Thus, by using heated I/I, the SOI FinFET performance is improved as compared with conventional RT I/I. 4. Conclusion Heated I/I contributes to the formation of the defect-free SDE in ultrathin fin region and is effective for improving the performance of ultrathin FinFETs. Thus, heated I/I technology is promising for SDE formation in future SOI FinFETs.

Preparation of ITO/SiOx/n-Si solar cells with non-decline potential field and hole tunneling by magnetron sputtering

Complete photo-generated minority carrier's quantum tunneling device under AM1.5 illumination is fabricated by depositing tin-doped indium oxide (ITO) on n-type silicon to form a structure of ITO/SiOx/n-Si heterojunction. The work function difference between ITO and n-Si materials essentially acts as the origin of built-in-field. Basing on the measured value of internal potential (Vbi = 0.61 V) and high conversion efficiency (9.27%), we infer that this larger photo-generated holes tunneling occurs when a strong inversion layer at the c-Si surface appears. Also, the mixed electronic states in the ultra-thin intermediate region between ITO and n-Si play a defect-assisted tunneling.

Plasma assisted molecular beam epitaxy growth and effect of varying buffer thickness on the formation of ultra-thin In0.17Al0.83N/GaN heterostructure on Si(111)

This work reports on the detailed plasma-assisted molecular beam epitaxy (PAMBE) growth of ultra-thin In0.17Al0.83N/GaN heterostructures on Si(111) substrate with three different buffer thickness (600 nm, 400 nm, and 200 nm). Growth through critical optimization of growth conditions is followed by the investigation of impact of varying buffer thickness on the formation of ultra-thin 1.5 nm, In0.17Al0.83N–1.25 nm, GaN–1.5 nm, In0.17Al0.83N heterostructure, in terms of threading dislocation (TD) density. Analysis reveals a drastic reduction of TD density from the order 1010 cm−2 to 108 cm−2 with increasing buffer thickness resulting smooth ultra-thin active region for thick buffer structure. Increasing strain with decreasing buffer thickness is studied through reciprocal space mapping analysis. Surface morphology through atomic force microscopy analysis also supports our study by observing an increase of pits and root mean square value (0.89 nm, 1.2 nm, and 1.45 nm) with decreasing buffer thickness which are resulted due to the internal strain and TDs.