Types Of Logic Gates Research Articles

Keplerate {Mo132}-Stearic Acid Conjugates: Supramolecular Synthons for the Design of Dye-Loaded Nanovesicles, Langmuir-Schaefer Films, and Infochemical Applications.

Self-assembly gives rise to the versatile strategies of smart material design but requires precise control on the supramolecular level. Here, inorganic-organic synthons (conjugates) are produced by covalently grafting stearic acid tails to giant polyoxometalate (POM) Keplerate-type {Mo132} through an organosilicon linker (3-aminopropyltrimethoxysilane, APTMS). Using the liposome production approach, the synthons self-assemble to form hollow nanosized vesicles (100-200 nm in diameter), which can be loaded with organic dyes─eriochrome black T (ErChB) and fluorescein (FL)─where the POM layer serves as a membrane with subnanopores for cell-like communication. The dye structure plays an essential role in embedding dyes into the vesicle's shell, which opens the way to control the colloidal stability of the system. The produced vesicles are moved by an electric field and used for the creation of an infochemistry scheme with three types of logic gates (AND, OR, and IMP). To design 2D materials, synthons can form spread films, from simple addition on the water-air interface to lateral compression in the Langmuir bath, and highly ordered structures appear, demonstrating electron diffraction in Langmuir-Schaefer (LS) films. These results show the significant potential of POM-based synthons and nanosized vesicles to supramolecular design the diversity of smart materials.

Multifunctional optical logic device based on nanoscale rectangular ring resonator

Integrated optical logic devices are essential building blocks for implementing all-optical arithmetic and logic unit. In this paper, an ultra-compact multifunctional optical logic device consisting of a rectangular ring resonator coupled with two parallel metal–insulator–metal waveguides is presented. The transmission characteristics of the structure are analyzed in detail via temporal coupled-mode theory. The finite-difference time-domain simulation results reveal that multiple logic functions can be implemented with the aid of the wavelength division multiplexing technique at different output ports. Specifically, all seven basic types of logic gates, half-adder, half-subtractor, and 2*4 decoder can be implemented by monitoring the transmission of through and drop ports at different wavelengths. More importantly, among these functions, six logic gates (OR, XNOR, NAND, NOR, XOR, and AND) and half-adder functions can be performed simultaneously; the NOT logic operation is performed with controllable output ports and selectable working wavelengths; the half-subtractor and 2*4 decoder functions can be operated simultaneously. The proposed logic device is characterized by a small area overhead, multifunctionality, fast response time, and ultrahigh-speed information processing. It may potentially be applied in on-chip universal and parallel photonic computing units.

Computationally efficient approach for risk-informed decision making

Probabilistic risk assessment (PRA) is used as an essential tool for risk-informed decision-making in the nuclear industry. The fault and event trees play a crucial role in PRA to estimate the probability of system failure based on the failure probabilities of components. The fault trees or event trees for an actual power plant unit can be fairly large in size with several different types of logic gates, interconnected events, dependent events, etc. A large fault tree can include hundreds of gates, basic events (BEs), multiple occurring events (MOEs), and dependent events. Complex connectivities can give rise to excessive computational demand and storage requirements for the analysis. Fault and event trees can be solved using the minimal cut-set approaches, or advanced quantification techniques such as Binary decision diagrams or Bayesian networks. However, these techniques can be computationally inefficient for larger fault trees and can run out of memory/storage space. This study focuses on developing and proposing a new approach for accurate estimation of the system-level risk while improving the computational efficiency significantly. More specifically, an attempt is made to reduce the complexity of the analysis of MOEs and dependent events in fault trees. The proposed algorithms in this study present a significant improvement over traditional approaches which makes it highly promising for additional development. The computational efficiency of the proposed approach over the traditional approach is illustrated for fault trees with a varying number of events and different types of logic gate connections.

Construction of intelligent interfaces based on stimulus-responsive hydrogels and ligand-free gold nanoparticles for electrocatalysis of isoquercitrin

In recent years, researchers have taken a keen interest in intelligent electrochemical interfaces. Nevertheless, incorporating multiple stimuli-responsive properties while ensuring a significant electrochemical response remains an interesting question. In this work, ligand-free gold nanoclusters grown on carbon nitride supports (AuNCs@N-C) were loaded on pyrolytic graphite (PG) electrode by layer-by-layer (LbL) method to obtain the {AuNCs@N-C}3 inner layers with good catalytic effect on isoquercitrin (IQ, 3-(β-d-Glucopyranosyloxy)-3′,4′,5,7-tetrahydroxyflavone). Then, the semi-penetrating stimuli-responsive hydrogel poly(N-isopropyl acrylamide)-poly(acrylic acid) (PNIPAM-PAA) was modified on the catalytic layer surface by drop-coating method. As a result, we obtained reversible electrochemical responses triggered by changes in temperature, sodium sulfate concentration, and pH. A new type of logic gate has been created by combining the difference in peak current during the stimulus response with the change in potential corresponding to the peak current. A 3-input/3-output tri-state buffer gate and a 1-to-4 demultiplexer have been designed through careful simplification, offering a fresh approach to building electrochemical pharmaceutical logic gates.

Stateful Logic Using Phase Change Memory

Stateful logic is a digital processing-in-memory (PIM) technique that could address von Neumann memory bottleneck challenges while maintaining backward compatibility with standard von Neumann architectures. In stateful logic, memory cells are used to perform the logic operations without reading or moving any data outside the memory array. Stateful logic has been previously demonstrated using several resistive memory types, mostly resistive RAM (RRAM). Here, we present a new method to design stateful logic using a different resistive memory-phase change memory (PCM). We propose and experimentally demonstrate four logic gate types (NOR, IMPLY, OR, NIMP) using commonly used PCM materials. Our stateful logic circuits are different than previously proposed circuits due to the different switching mechanisms and functionality of PCM compared to RRAM. Since the proposed stateful logic forms a functionally complete set, these gates enable the sequential execution of any logic function within the memory, paving the way to PCM-based digital PIM systems.

Research on Common Mode Analysis Method in System Safety Analysis

In system safety analysis, the existence of Common Mode Failure (CMF) greatly undermines the independence of components and poses great threat to safety of the system. In Common Mode Analysis (CMA), whether CMF needs to be considered for basic events under different types of logic gates in Fault Tree, it lacks strict reasoning and comprehensive consideration. This paper takes CMF of the same and different levels under "AND gate" and "OR gate" in fault tree as an example, and uses reasoning analysis and mathematical calculation methods to compare the influence of the existence of CMF on failure rate of the system. The results show that whether CMF need to be considered for the component depends on the type of logic gate correspond to the higher-level component. The research results have certain reference value for the analysis of CMF in CMA.

GPR-Based Framework for Statistical Analysis of Gate Delay under NBTI and Process Variation Effects

With the aggressive scaling of feature size, Negative Bias Temperature Instability (NBTI) and Process Variation (PV) have become major issues for circuit reliability and yield. In this paper, we analyze the variation of gate delay by jointly considering NBTI and PV effects. Using Gaussian Process Regression (GPR) learning interface, a Statistical Gate Delay Extraction (SGDE) framework is proposed. Typical types of logic gates are simulated with commercial 28 nm technology for verifying the performance of SGDE in the experiment. Compared to the golden data, the results show that our proposed approach achieves minimal loss of accuracy with significant runtime speed-up.

All-type optical logic gates using plasmonic coding metamaterials and multi-objective optimization.

In this article, we propose a multiport plasmonic system (MPS) for implementing all-type logic gates based on coding metamaterials and inverse design technology. Compared to traditional plasmonic logic gates, the coding metamaterials based on metal-dielectric-metal (MDM) structures provide powerful programmability for manipulating electromagnetic (EM) waves and have a compact footprint (0.8 µm × 1.1 µm) for integration. To improve the performance of logic gates, the nondominated sorting genetic algorithm version II (NSGA-II) are used to optimize the distributions of coding metamaterials. After the optimization, the simulation results show that all types of logic gates (AND, OR, NOT, NAND, NOR, XNOR, and XOR) can be obtained with an operating wavelength of 1.31 µm. The maximum extinction ratios between logic states "1" and "0" reach 10.15 dB, 57.54 dB, 43.25 dB, 20.76 dB, 10.42 dB, 24.04 dB, and 27.74 dB for the AND, OR, NOT, NAND, NOR, XNOR, and XOR gates, respectively. Moreover, wavelength-tunable logic operations are also demonstrated to work within a wide spectrum. Our proposed plasmonic system not only provides a universal scheme for implementing all-type compact logic gates for optical processing and computing but also demonstrates effective applications of inverse design in nanophotonic devices.

Neutron-Induced Pulsewidth Distribution of Logic Gates Characterized Using a Pulse Shrinking Chain-Based Test Structure

This work presents measured data showcasing neutron-radiation induced Single Event Transient (SET) pulse widths in distinct standard logic gate types, together with a detailed analysis on the choice of design parameters impacting the corresponding sampled pulse width distributions. The SET pulse width distributions are obtained from a high density, array-based characterization-vehicle, implemented in 65nm planar CMOS and 16nm FinFET processes, featuring a tunable, high resolution pulse-shrinking chain together with a closely embedded sampling circuit to avoid width distortion effects. The proposed macro employs standard logic gate-chains in varying lengths, threshold voltages (VTH) and transistor width flavors as the Devices-Under-Test (DUTs). Measured irradiation data for a range of operating voltages from nominal down to near-threshold reveals the relative impact of the chosen design parameters such as VDD, VTH, device width and the logic chain length as well as their interplay, impacting the overall soft-error susceptibility and the sampled pulse width distributions among the different standard gate types.

MNAzyme probes mediated DNA logic platform for microRNAs logic detection and cancer cell identification

Here, a MNAzyme probes mediated DNA logic platform was developed for microRNAs (miRNAs) logic detection and cancer cells identification. A series of MNAzyme probes containing the cleavage active center were designed. Four types of logic gates were constructed, including YES, AND, XOR and NOR gate. These logic gates used miRNAs that were high expression in cancer cells as logic inputs and used MNAzyme cleavage amplification reaction to output signals. For the construction of intracellular logic gates, MnO2 nanosheets were used as carriers and cofactor providers. When MnO2 nanoprobes entered the cells through endocytosis, the intracellular glutathione degraded the MnO2 nanosheets to release the cofactor Mn2+ and MNAzyme probes. The MNAzyme probes bound to the miRNAs and catalyze the MNAzyme cleavage amplification reaction, producing enhanced fluorescent signal with “true” output. The logic detection of miRNAs was achieved by integrating information from the AND, XOR and NOR logic gates. Moreover, through the construction of intracellular YES and AND logic gates, the cancer cells identification, especially the identification of same type of cancer cells with different phenotypes was achieved. These experimental results showed that this platform held great promise in accurate diagnosis and treatment of cancer.

The idea and sense behind various types of logic gates

The idea and sense behind various types of logic gates

Optical variations turn molecules into a diverse array of logical operators

By changing its excitation and emission wavelengths, a molecular system can be tuned to function as different types of logic gates.

Towards flexible CMOS circuits.

Tellurium thin films evaporated at cryogenic temperatures facilitate the realization of high performance wafer-scale flexible p-type field-effect transistors and various types of logic gates.

Realization of all logic gates using metamaterials based three dimensional photonics structures: A future application of 3D photonics to optical computing

Understanding of all type of logic gates (NOT,AND,OR,NAND,NOR,Ex-OR,Ex-NOR) is disclosed in this paper using metamaterials based three dimensional photonics structure, which is a remarkable progress of photonics. The principle of investigation of the same is analyzed through photonic band gap analysis of 3D structure, which is carried out by using plane wave expansion method. Moreover, the operational mechanism for the same is manipulated with two signals of IR regime, 1950 nm and 2150 nm with 3D photonics. Further, the physics of research relies on the effective permittivity of metamaterial based 3D structures with respect to said signal. The reason for choosing such material is that zero absorption loss is associated with it. The outcome of logic gates is envisaged through the analysis of transmittance and reflectance characteristics. The interesting fact of this work is that a particular logic gate is seen with fixed values of lattice constant and diameter of air holes. Finally, the simulation upshot divulged that proper lattice spacing and diameters of air holes control reflection and transmission characteristics, which are onus to understand the different logic operation.

Realisation of all photonic logic gates using plasmonic-based photonic structure through bandgap analysis

NOT, AND, OR, Ex-OR, NAND, NOR,and Ex-NOR logic gates have been realized in this work with the help of plasmonic-based two-dimensional triangular structure. The physics of the research manipulates with the photonic band gap analysis where the mathematics of the band calculation manipulates with plane wave expansion. Further both physics and mathematics of this communication relies on effective refractive index,the diameter of air holes and lattice constant of the structure to envisage optical logic gates. Moreover, the operation ofphotonic logic interacts with two signal of input (orange and red signals) where IR signal of 1.2 μm is taken as a power supply signal. Lastly, the output of this paper discloses that the suitable combination of plasmonic-based triangular structures with suitable values of lattice constant and diameter of air holes bestows all type of logic gates, which could be future applications in the field of optical computing.

Design and Analysis of Logic Gates using GaN based Double Gate MOSFET (DG-MOS)

The double gate MOSFET, where two gates are fabricated along the length of the channel one after another. Design of logic gates is one of the most eminent application of Double Gate MOSFET. Gallium nitride (GaN) based metal-oxide semiconductor field-effect transistors (MOSFETs) are shown to be promising for digital logic applications. This paper describes the design and analysis of different types of logic gates using GaN based DG-MOSFET. The gate length (LG) is kept constant at 10.6 nm. The gate voltage varies from 0 to 1 V for the device switching from turn OFF to turn ON-state. For the device with HfO2 as gate oxide, the ON-state current (ION) and OFF-state current (IOFF) are found 8.11×10-3 and 6.38605×10-9A/μm respectively. The leakage current is low for the device with HfO2 as compared to that for the device with ZrO2. The subthreshold swing (SS) is 68.7408 mV/dec for the device with HfO2.

Molecular engineering of logic gate types by module rearrangement in 'Pourbaix Sensors': the effect of excited-state electric fields.

Two types of fluorescent logic gates are accessed from two different arrangements of the same modular components, one as an AND logic gate (1) and the other as a PASS 0 logic gate (2). The logic gates were designed with an 'electron-donor-spacer1-fluorophore-spacer2-receptor' format and demonstrated in 1 : 1 (v/v) methanol/water. The molecules consist of ferrocene as the electron donor, 4-aminonaphthalimide as the fluorophore and a tertiary alkylamine as the receptor. In the presence of high H+ and Fe3+ levels, regioisomers 1a and 1b switch 'on' as AND logic gates with fluorescence enhancement ratios of 16-fold and 10-fold, respectively, while regioisomers 2a and 2b are functionally dormant, exhibiting no fluorescence switching. The PASS 0 logic of 2a and 2b results from the transfer of an electron from the excited state fluorophore to the ferrocenium unit under oxidising conditions as predicted by DFT calculations. Time-resolved fluorescence spectroscopy provided lifetimes of 8.3 ns and 8.1 ns for 1a and 1b, respectively. The transient signal recovery rate of 1b is ∼10 ps while that of 2b is considerably longer on the nanosecond timescale. The divergent logic attributes of 1 and 2 highlight the importance of field effects and opens up a new approach for regulating logic-based molecules.

A type of all-optical logic gate based on graphene surface plasmon polaritons

In this paper, a novel type of all-optical logic device based on graphene surface plasmon polaritons (GSP) is proposed. By utilizing linear interference between the GSP waves propagating in the different channels, this new structure can realize six different basic logic gates including OR, XOR, NOT, AND, NOR, and NAND. The state of “ON/OFF” of each input channel can be well controlled by tuning the optical conductivity of graphene sheets, which can be further controlled by changing the external gate voltage. This type of logic gate is compact in geometrical sizes and is a potential block in the integration of nanophotonic devices.

Realization of all logic gates using hybrid grating structure: An application of silicon photonics

The outcome of present research work divulges all type of logic gates (NOT, AND, OR, XOR, NAND, NOR, XNOR) using two simple silicon grating structures, where plane wave expansion method manipulates to such structure to investigate the transmission characteristics. Output results infers that grating parameter such as number of layers, thickness of odd and even layer, the length of grating odd the proposed structure plays vital role to realize different type of optical logic gates.

Implementing Boolean Functions in Hybrid Digital-Analog Systems

As Moore's Law winds down, we look to do more with less---more computing with fewer components, that is. One approach is ``chaos computing'', in which nonlinear dynamics is exploited to create any type of logic gate on the fly, almost instantly, from a single generic setup. Starting from super-stable initial conditions robust to noise, the authors combine a conventional digital circuit with an analog nonlinear circuit of just three transistors, to implement arbitrary Boolean functions $e\phantom{\rule{0}{0ex}}x\phantom{\rule{0}{0ex}}p\phantom{\rule{0}{0ex}}o\phantom{\rule{0}{0ex}}n\phantom{\rule{0}{0ex}}e\phantom{\rule{0}{0ex}}n\phantom{\rule{0}{0ex}}t\phantom{\rule{0}{0ex}}i\phantom{\rule{0}{0ex}}a\phantom{\rule{0}{0ex}}l\phantom{\rule{0}{0ex}}l\phantom{\rule{0}{0ex}}y$ faster than in prior architectures. This improves the reliability of chaos-based systems, and expands the scope of their potential applications.