Two-tone Input Research Articles

Microwave frequency switching delays in phase-locked period-one dynamics of semiconductor lasers.

Modern microwave switches require high switching speeds to rapidly route data over multiple radio channels while minimizing the routing delay. This Letter proposes a novel, to the best of our knowledge, microwave frequency switching system using phase-locked Period-one (P1) dynamics of semiconductor lasers. When a semiconductor laser is optically injected by microwave-modulated optical signals, which carry two-tone input microwaves at 29 and 37 GHz, with proper injection power controlled by dual-voltage control signals, P1 dynamics are excited in the semiconductor laser and subsequently phase-locked by one of the input microwave tones. We have observed positive and negative switching delays in the switching process. For instance, a positive delay is observed when the system requires additional optical power to transition from a phase-locked state at 29 GHz to an unlocked state. Conversely, a negative delay occurs when the unlocked P1 dynamics approach but do not reach a 37-GHz frequency and then rapidly lock to the tone, thereby surpassing the speed of the control signals. These dual delays are instrumental in enhancing the switching speed of our system, enabling it to surpass the voltage switching time of the control signals by a factor of 3.6. In addition, by leveraging these dual delays, the duration of the microwave tones can be further extended in the switching process.

Real-time reconfigurable on-chip photonic frequency decoder.

A group-delay-unit-based integrated silicon photonic integrated circuit (PIC) is employed as a reconfigurable analog radio frequency decoder, which provides a real-time temporal and spectral analysis of any arbitrary multi-tone signal in the micro- and mm-wave range. The circuit is based on cascaded Mach-Zehnder interferometer embedded silicon microring resonators as variable delay units. The temporal decoding of the multi-tone input signal is demonstrated by tuning the signal with respect to the ring resonator delay and resonance. A one-to-one conformal time-to-frequency mapping provides real-time spectral decoding of the signal under test without additional digital signal processing. The idea is validated by several experimental results with single-tone and two-tone input signals in a compact, low-power, silicon PIC. The proposed real-time temporal analog frequency decoder may be very intriguing for high-speed, low-latency wireless applications, such as autonomous driving and 6G.

Effect of different separation frequencies of the two-tone input signal on the output power of GaN on SiC HEMT

Effect of different separation frequencies of the two-tone input signal on the output power of GaN on SiC HEMT

Simulation Analysis of RBW Parameters of Spectrum Analyzer Based on Convolution Approach

Resolution Band Width (RBW) represents the 3 dB bandwidth of the internal IF filter of the spectrum analyzer, the setting of which greatly affects the clarity of the output spectrum line of the spectrum analyzer. Its reasonable value is essential to correctly distinguish the signals of different frequencies, especially in the case of aliasing of the output spectrum. Thus, it is of great significance to study the relationship between the setting of RBW and the output spectrum. Due to the expensive spectrum analyzer, the RBW adjustment range, frequency range and output accuracy are limited, so this paper will apply an economic, RBW arbitrary adjustable, high accuracy equivalent convolution method for the simulation of the RBW parameters of the spectrum analyzer, and evaluate the effect of RBW and filter type on the degree of output spectrum aliasing based on a typical equal-amplitude two-tone signal input, and finally give setting suggestions on RBW and filter type.

Linearity-Enhanced and Highly Efficient Doherty Power Amplifier: 16th High Efficiency Power Amplifier Student Design Competition

The 16th High Efficiency Power Amplifier (HEPA) Student Design Competition (SDC), organized by the IEEE Microwave Theory and Techniques Society, was held virtually in collaboration with Keysight Microwave Laboratory for the live measurement. This contest focuses on the PAs that have both high efficiency and high linearity over a relatively broad bandwidth. The participants are required to design and fabricate a highly efficient, linear power amplifier (PA) at a frequency of their choice between 1 and 10 GHz. The winning team is determined by the designed PA's highest linear power added efficiency (PAE) at the lowest output power level while maintaining a carrier-to-intermodulation (C/I) ratio of greater than 30 dB through a two-tone input signal measurement. To have a competitive entry in the contest, it is necessary to start with the statement of the competition's rules.

Efficient Offline Outer/Inner DAC Mismatch Calibration in Wideband ΔΣ ADCs

Distortion due to feedback DAC mismatch is a key limitation in $\Delta \Sigma $ ADCs for wideband wireless communications. This article presents an efficient frequency-domain mask-based offline mismatch calibration method of both the outer DAC and the inner DACs in a $\Delta \Sigma $ ADC. The test stimulus for the calibration is a two-tone signal near the band edge. To avoid the need for high-performance signal generation, a frequency mask is applied to void the stimulus signal and its phase noise. In this way, the method is robust against distortion and jitter in the stimulus signal, which therefore could be combined from two low-quality signal generators. The two-tone band-edge signal has the additional benefit that the number of needed samples of the excitation signal is very modest because as many intermodulations as possible contribute to the calculation of the mismatch errors of the DACs. Experimental results confirming the calibration method are obtained from a prototype chip, designed for an 85MHz signal bandwidth in 28nm CMOS technology. A two-tone stimulus around 78 MHz is applied to calculate the mismatch of the outer DAC and the inner DAC with only 68K samples. With the DACs calibrated, an SFDR improvement of 28.1 dB is achieved for a single-tone input at 5 MHz, while for a two-tone input around 71 MHz, the IM3 is improved from −63.6 dBc to below the noise floor (<−94.1 dBc). This illustrates the effectiveness of the approach.

Analysis and improvement of PSRR in an envelope‐tracking power amplifier using a common‐drain amplifier topology

A common-drain power amplifier (PA) for envelope tracking systems is presented. In envelope tracking, the main PA operates mostly in compression and the power supply rejection ratio (PSRR) is not high. Furthermore, the output noise of the supply modulator can be mixed with the RF signal and generates out-of-band emissions. In this article, instead of using a common-source topology, the PSRR of the envelope tracking PA is inherently improved by utilizing a common-drain topology. A comprehensive analysis shows that the common-drain topology is less sensitive to the supply noise, as compared to the conventional common-source topology. The proposed common-drain PA is implemented using a discrete LDMOS PD20010-E RF transistor. Measurement results show that the PSRR of the proposed common-drain PA is improved by up to 7 dB as compared to that of the common-source PA. For a two-tone input with 10 MHz bandwidth at the center frequency of 700 MHz, the power added efficiency (PAE) and IM3 of the envelope tracking common-drain PA are 20% and − 28 dBc, respectively, at an average output power of 33.4 dBm. The amplifier also shows a 12.4 dB power gain. Moreover, by utilizing the envelope tracking, the PAE is improved by more than 5%.

A Low Power Frequency Tunable FSK Receiver Based on the N-Path Filter

This brief presents a low power frequency tunable frequency shift keying (FSK) receiver based on N-path filter. The N-path filter serves as the first stage of the receiver and converts the frequency difference between two tones to amplitude difference. To evaluate the maximum achievable data rate of the proposed receiver, we studied the behavior of N-path filter under two-tone input condition. With linear periodically time-variant theory, the equations for transient response between two tones are derived for differential two-port N-path filters and verified by the simulation. Based on the analysis, an optimum data rate is obtained for the proposed N-path filter-based FSK receiver. Implemented in 0.13- $\mu \text{m}$ CMOS process, the chip occupies 300 $\times700\,\,\mu \text{m}^{2}$ , achieves data rate of 2.5 Mb/s, and 74 pJ/bit energy per bit at −65 dBm sensitivity. Frequency tuning is also demonstrated.

Sliding-band dynamic range compression for use in hearing aids

Sensorineural hearing loss is associated with elevated hearing thresholds, reduced dynamic range, and loudness recruitment. Signal processing with dynamic range compression is used in hearing aids for presenting all the sounds comfortably within the limited dynamic range of the listener. A dynamic range compression technique, named as ‘sliding-band compression’, is proposed to overcome the shortcomings of the commonly used single-band and multiband compression techniques. The gain at each frequency index is calculated as a function of the short-time power in an auditory critical band centered at it. The technique avoids the attenuation of high-frequency components due to the presence of strong low-frequency components, which may occur in single-band compression. Further, it avoids distortions in the shape of spectral resonances and discontinuities during the resonance transitions, which may occur in multiband compression. The proposed technique was implemented for offline processing and compared with single-band compression and multiband compression using objective measures and different test inputs. For two-tone inputs, the single-band compression showed attenuation of the high-frequency tone with an increase in the level of the low-frequency tone. For swept-frequency single-tone input, the multiband compression showed errors in the tone amplitude of 1.5–2.5 dB for compression ratio of 2–10. Sliding-band compression did not show either type of error. The technique has been also implemented using a fixed-point processor for real-time processing with audio latency acceptable for face-to-face communication.

Design of High Efficiency Linear Power Amplifier with a Continuous Broadband Based on Two-Tone Signal Analysis

In this paper, an innovative approach to achieve broadband linear power amplifier (PA) with a continuous broadband is presented. The proposed method mainly depends on the theory of control of intermodulation products and harmonics. This method results in a continuous sweet spots over a wide bandwidth. Based on the continuous sweet spots, a suboptimal solution is derived for improving the efficiency and linearity of broadband PAs. To verify the effectiveness of this method, one broadband PA operating over 4.5–5.5[Formula: see text]GHz is developed and measured, it indicates that the peak output power of the PA is 35–57[Formula: see text]dBm for a small signal input with a gain of 12[Formula: see text]dB, and the peak drain efficiency (DE) of the PA is larger than 57% over the whole working band. However, when the PA is stimulated by a 5[Formula: see text]MHz two-tone signal input, we observe that the DE keeps above 38% under the condition of the measured third-order intermodulation distortion (IMD3) is not larger than [Formula: see text][Formula: see text]dBc.

A New Tune-Dependent Multiple-Gated Transistor Linearization Technique

In this paper, a new multiple-gated transistor (MGTR) linearization technique is presented. To simultaneously keep linearity and tuning capability of proposed operational transconductance amplifier (OTA), the auxiliary transistors which are employed for [Formula: see text] cancellation of differential pair (DP) stage are body-driven through a tune-dependent voltage. By this way, the third-order nonlinearity of DP is reduced for a wide range of transconductance values from 5.1 to 35.6[Formula: see text][Formula: see text]A/V. The OTA works with 1.2[Formula: see text]V supply voltage and its power consumption changes between 137.4 and 156[Formula: see text][Formula: see text]W at the entire tuning range. For [Formula: see text][Formula: see text][Formula: see text]A/V ([Formula: see text][Formula: see text]V) and for 0.6[Formula: see text][Formula: see text] input voltage, the simulation results show 6[Formula: see text]dB reduction in the total harmonic distortion (THD) of proposed OTA when the MGTR linearization technique is used and 15[Formula: see text]dB reduction when the tune-dependent body driving is also utilized. The proposed OTA is employed in a third-order low-pass Butterworth filter which is tunable from 2 to 18[Formula: see text]MHz. The in-band IIP3 of filter is 16.9 and 12.4[Formula: see text]dBm, respectively, for 2 and 18[Formula: see text]MHz cutoff frequencies while the two-tone input voltage is applied at 1[Formula: see text]MHz.

Development of Efficient High Power Amplifier With More Than an Octave Bandwidth

This paper presents a design of a GaN HEMT-based power amplifier (PA), with enhanced efficiency and linearity over the operation band from 0.5 to 1.5 GHz. The design is based on wideband load-pull and source-pull analysis. A novel procedure is developed to optimize the impedance values and synthesize the matching networks. The amplifier achieves drain efficiency of 40%–68% and power added efficiency (PAE) of 35.7%–63.8%, over the entire frequency band measured for an input power of 24 dBm. To ensure flat gain response, a high pass filter is deployed at the input of the PA, thus achieving a gain of 13.8 ±1 dB for the entire band. Wideband matching circuits are realized on Taconic RF35 with dielectric constant of 3.5 and thickness of 0.76 mm. The PA is found to maintain output power of 36.8–38.3 dBm across the frequency band. Carrier to intermodulation distortion ratio for two-tone input signal with 24-dBm power per-tone and a spacing of 5 MHz is found to be better than 30 dB. In addition, the PA is tested for frequency spacing values of 20 and 25 MHz and good linearity levels are attained. The developed PA thus provides attractive features related to efficiency, linearity, and extended bandwidth, which make this amplifier appropriate for implementations in various wireless communications systems.

Analysis and Design Procedure of a Novel Low Power Highly Linear Operational Transconductance Amplifier

In this paper, a new highly linear operational transconductance amplifier (OTA) is presented. Proposed OTA employs two linearization techniques of cross-coupled double differential pairs and resistive source degeneration to achieve highly linear response under low power consumption. Considering the linearity and the frequency response issues as main parameters of OTA in the communication circuits, design procedure is theoretically formulated for the best linearity and optimum frequency compensation. Proposed OTA is simulated in 0.18-μm TSMC CMOS technology by Hspice simulator. While, the power consumption is only 467 μW, applying two-tone input voltage with amplitude of 0.6 Vp-p at 10 MHz frequency results in -61 dB third-order intermodulation (IM3) distortion of the output current that still remains below -44 dB for amplitudes up to 1 Vp-p. A precise frequency response analysis is performed which has resulted in optimum values of resistor and capacitor for miller compensation. Using common mode feedback in both stages and push-pull based output stage lead to 108 dB CMRR at DC that decreases to 84.5 dB at 100 kHz frequency.

Harmonic and intermodulation performance of double-gate CMOS inverting voltage amplifier

This paper presents a simple mathematical model for the transfer characteristic of the double gate (DG) CMOS inverting voltage amplifier. The model yields closed-form expressions for the amplitudes of the fundamental and distortion components of the output voltage resulting from a multisinusoidal input voltage for different scenarios and values of the bottom gates voltages. The special case of a two-tone equal-amplitude input voltage is considered in detail. The results show that the distortion performance of the DG-CMOS inverting voltage amplifier is strongly dependent on the bottom gates voltages and the amplitudes of the input sinusoids with the third-order intermodulation component dominating over the whole range of the input voltage amplitudes and different bottom gates voltages.

A 15-MHz Bandwidth 1-0 MASH $\Sigma \Delta $ ADC With Nonlinear Memory Error Calibration Achieving 85-dBc SFDR

A 1-0 MASH ΣΔ analog-to-digital converter (ADC) demonstrates a digital linearization technique for the first time treating integrator distortion with memory and capacitor mismatch errors. A two-tap sequential polynomial derived from an output-referred error analysis accurately models the non-ideality of a first-order modulator. The model parameters are extracted by correlating various moments of the ADC digital output with a one-bit pseudorandom noise (PN) superimposed on the input, largely reducing the circuit overhead associated with the nonlinear calibration. The prototype ADC employing amplifiers with a gain of roughly 30 dB measures an 85-dBc spurious-free dynamic range (SFDR) and a 67-dB signal-to-noise and distortion ratio (SNDR) for a 1.1- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\rm V} _{\rm PP} $</tex></formula> ( <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$-$</tex></formula> 1-dBFS), 4.99-MHz sinusoidal input at 240 MHz sampling clock (8× OSR) with a 7.5-msec calibration time. For a 1.1- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\rm V} _{\rm PP}$</tex></formula> two-tone input at 14.9 MHz and 15.1 MHz, the third-order intermodulation product (IM3) after calibration is 87.1 dBc, which is over 30 dB better than that without calibration. The core ADC consumes 37 mW from a 1.25-V supply and occupies 0.28 mm 2 in a 65-nm CMOS low-leakage digital process in which the transistor threshold voltages are around 0.5 V.

Predicting nonlinear distortion in multistage amplifiers and gm-C filters

Closed-form expressions to predict nonlinear distortion in analog integrated circuits are derived by calculating the solution through a perturbation method up to the second-order of approximation, in both cases of a single and of a two-tone input signal. The expressions of the harmonics and of the intermodulation products are derived by approximating the circuit nonlinearities by cubic polynomials, which are widely used in the analysis of the distortion in multistage amplifiers and continuous-time transconductor---capacitor (gm-C) filters. The application to two typical circuits, belonging to these two classes of circuits, shows the simplicity and versatility of the presented formulas, whose accuracy is checked by numerical simulations performed using the method of harmonic balance.

New single-parameter models for electronic circuits with even symmetry nonlinearity

In this paper single-parameter models are presented for the instantaneous characteristics of electronic circuits/systems exhibiting even-symmetry nonlinearities. The models can easily provide closed-form expressions, in terms of the ordinary Bessel functions, for the amplitudes of the second-harmonic and second-order intermodulation components at the output of the nonlinear circuit/system excited by a multisinusoidal input signal. Moreover, by combining the proposed models with the previously published models for instantaneous characteristics exhibiting odd-symmetry nonlinearities, a new method and apparatus are proposed for characterizing nonlinear circuits/systems exhibiting both even- and odd-symmetry nonlinearities. The proposed method and apparatus use the amplitudes of the measured output second- and third-order intermodulation components resulting from a two-tone equal-amplitude input signal.

A modeling study of cortical waves in primary auditory cortex

Cortical waves have been observed in many cortical areas, including the primary auditory cortex (AI). The thalamorecipient layer (IV) of AI is an ideal test-bed for the study of cortical waves because the inputs from the thalamus are arranged tonotopically along an axis. Wave propagation along this axis is essentially one-dimensional. Thus, a biologically realistic model of a piece of this area can act like a 'ripple-tank' used for the study of one-dimensional wave motion in physics. The simulations described here were implemented with the GENESIS 2.3 and 3 (G-3) simulators [1]. The primary objective of this modeling study was to determine the effects of axonal conduction velocity (often neglected, but significant), as well as synaptic time constants, on the ability of such a network to create and propagate cortical waves. Figure ​Figure11 illustrates that, using parameters that are within the range of commonly measured experimental values, such propagation (A-D), and even constructive interference (E), is possible. The model is also being used to study the interaction between single and two-tone input and normal background activity, and the effects of synaptic depression from thalamic inputs. The simulation scripts have the additional purpose of serving as tutorial examples for the construction of cortical networks with GENESIS. The present model has fostered the development of the G-3 Python network analysis and visualization tools used in this study [2]. Full simulation scripts and documentation with tutorials for extending them to a more complete model of auditory cortex will be available on the http://genesis-sim.org web site. Figure 1 Frames (A-E) show successive intervals in the development and interference (E) of cortical waves from a two-tone input. Membrane potential is shown on the left and excitatory post-synaptic currents on the right. AI has been less well studied than other neocortical areas, and any complete model will contain an enormous space of poorly-quantified parameters to be explored. In order to simplify the model enough to analyze, it was limited to a population of pyramidal cells and a smaller population of inhibitory basket cells. Inputs from other cortical layers were crudely represented by Poisson-distributed random inputs to provide background levels of firing for the two populations that are in agreement with measured values. The components within this simple model are represented realistically, with parameters constrained by experimental measurements. The multi-compartmental spiking neurons have firing patterns representative of pyramidal and basket cells in the auditory cortex. Synaptic inputs occur at appropriate locations on the dendrites. The distance dependence of the connection probabilities for the four types of connections was fit to experimental measurements. It has equivalent ranges for excitatory and inhibitory connections, unlike many models that account for lateral inhibition by assuming a greater range for inhibitory connections. Although the thalamic input model provides for more realistic inputs, the example shown in Figure ​Figure11 used single row excitations of spike trains at 220 and 440 Hz in the absence of background input.

Harmonic and intermodulation performance of MoS2FET- and GFET-based amplifiers

This paper presents a simple mathematical model for the output---input voltage characteristic of the graphene field effect transistor (GFET)- and the molybdenum disulfide field effect transistor (MoS2FET)-based inverting amplifiers. The model, basically a Fourier series, yields closed-form expressions for the amplitudes of the harmonic and intermodulation components of the output voltage resulting from a multisinusoidal input voltage. The special case of a two-tone equal-amplitude input voltage is considered in detail. The results show that the harmonic and intermodulation performance of the complementary GFET- and the MoS2FET-based inverting amplifiers is strongly dependent on the bias voltage and the amplitudes of the input tones with the third-order intermodulation component dominating over a wide range of the input voltage amplitudes.

An analog/digital pre-distorter using particle swarm optimization for RF power amplifiers

In this paper, a novel pre-distorter is presented using the particle swarm optimization (PSO) for an RF power amplifier linearization has been presented. We used the PSO in order to design of an efficient pre-distorter for the linearization of the output of an RF power amplifier by using the output data of the proposed power amplifier. The PSO is implemented to estimate and optimize the coefficient parameters of the work function in the proposed pre-distorter block diagram. The proposed method using PSO is most efficient because this approach is independent of the output of the power amplifier. The proposed method has been simulated with two-tone input signal and output power spectrum has been compared, where the obtained adjacent channel leakage ration (ACLR) is better than 50dBc for both channels. Therefore, a quite significant improvement in linearity is achieved.