Two-stage Power Factor Correction Research Articles

A Hybrid Quasi-Single-Stage AC-DC Converter with Low Twice-Line-Frequency Output Voltage Ripple

Power factor correction (PFC) converters have been frequently employed in various switching power supply devices to reduce input current harmonics. However, the PFC converter suffers from an obvious twice-line-frequency output voltage ripple due to the instantaneous power imbalance between constant output power and variable input power. Suppression of twice-line-frequency ripple usually can be realized by the post-stage DC-DC converter of the two-stage cascade PFC converter; however, the two-stage cascade PFC structure is challenging to realize high efficiency since the energy is transferred twice. To achieve high power factor, high efficiency, and low twice-line-frequency ripple, a hybrid quasi-single-stage (QSS) AC-DC converter is presented in this paper, which consists of a dual output hybrid Boost/Flyback PFC converter and a Buck ripple compensation circuit (RCC). The fundamental principles of the proposed converter and the critical conditions of operation mode transition are discussed in the paper. To confirm that the twice-line-frequency ripple is effectively suppressed, the small signal model of Buck RCC is built and analyzed. Moreover, the main characteristics, including operation mode transition angle, input current, power factor, and switching frequency of the proposed hybrid QSS AC-DC converter, are analyzed. By building a 120 W experimental prototype to validate the feasibility of the proposed hybrid QSS AC-DC converter, the experimental results show that the proposed converter can realize PFC function with high efficiency and extremely low twice-line-frequency output voltage ripple.

Stacked-Switch Power Factor Correction Architecture

Two-stage power factor correction (PFC) architecture, consisting of a boost PFC front end and an isolated DC–DC converter, is widely used in AC–DC applications. However, the boost PFC front end loses zero-voltage-switching (ZVS) at high-line conditions, limiting its practical switching frequency. Consequently, a relatively large boost inductor and EMI filters are needed in the two-stage architecture, leading to a lower power density design. This article proposes a stacked-switch PFC architecture that allows all switches to achieve full-load-range ZVS at a universal input while reducing the component counts compared to the two-stage architecture. As a result, the stacked-switch architecture can operate efficiently at a much higher switching frequency than the two-stage architecture, allowing for higher power density and lower cost. Additionally, this architecture can be operated at a constant switching frequency, which is beneficial for simplifying the magnetics and controller design. A 150-W-universal-input prototype is built to verify the effectiveness of the stacked-switch PFC concept. The prototype measures 92.9 % peak efficiency and 53.9 W/in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^{3}$</tex-math></inline-formula> power density by box volume.

Star Power Factor Correction Architecture

Conventional two-stage power factor correction (PFC) architecture based on a boost PFC front end and an isolated dc–dc back end is increasingly challenged by the recent trend toward higher power density and efficiency. One key reason for the challenge is the difficulty of increasing the operating frequency of the boost PFC stage. This article presents a new star PFC architecture that allows the boost PFC stage to operate efficiently at a higher frequency while maintaining the performance of the second dc–dc stage, leading to a high-power-density and high-efficiency ac–dc converter design across a universal input. The high performance of star architecture is enabled by realizing: 1) continuous-conduction-mode (CCM) operation of the boost PFC stage; and 2) full-range zero-voltage-switching (ZVS) of all active switches. In addition, the star architecture can: 1) operate at a constant frequency via a proper selection of the circuit topology and modulation method; and 2) be controlled based on simple and low-cost analog circuits. A 300-kHz, 240-W, 48-V-output, and universal-input prototype is built to verify the performance of the star architecture, showcasing high power factor, constant output voltage, 97.1 % full-load efficiency, 55.6 W/in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^{3}$</tex-math></inline-formula> power density by box volume.

Second Harmonic Current Reduction Schemes for DC–DC Converter in Two-Stage PFC Converters

For the two-stage single-phase power factor correction (PFC) converter, its instantaneous input power pulsates at twice the line frequency, generating the second harmonic current (SHC) at the dc-bus port. The dc–dc stage is used to regulate the output voltage or the dc bus voltage in different applications, and the SHC reduction schemes for the dc–dc stage with different control objectives are discussed in this article. When the dc–dc stage regulates the output voltage, it is pointed out that the control bandwidth of the dc–dc stage is required to be high enough and the dc bus capacitor should be large enough to suppress the SHC, and the design of the dc bus capacitor is given. When the dc–dc stage regulates the dc bus voltage, a virtual impedance is added in series with the input/output of the dc–dc stage to suppress the SHC, and a virtual impedance is added in parallel with the dc bus to improve the dynamic performance. The selection and design of the virtual impedances are also given. Based on that, three specific control schemes are proposed for the dc–dc stage to suppress the SHC, and the parameters design method is also presented. Finally, a 3.3-kW two-stage single-phase PFC converter is fabricated and tested in the lab to verify the effectiveness of the proposed SHC reduction schemes.

Stability Analysis of Two-Stage Single-Phase Converter System Adopting Electrolytic Capacitor-Less Second Harmonic Current Compensator

For the two-stage single-phase converter, including the power factor correction (PFC) ac-dc converter and dc-ac inverter, a second harmonic current compensator (SHCC) can be introduced to handle the second harmonic current (SHC) for removing the undesired electrolytic capacitor. Consequently, the two-stage single-phase converter becomes a multi-converter system. In this paper, the ac-dc stage or dc-ac stage in the system is categorized into two types in terms of the control objectives, i.e., the bus-voltage-controlled converter (BVCC) and the bus-current controlled converter (BCCC). The SHCC is a BCCC since its bus-port current is directly controlled, and the bus-port impedance of the SHCC is derived, which is affected by the ac-dc stage or dc-ac stage since the SHC reference is extracted from them. The system stability is investigated with the impedance-based stability criterion, and it is found that the system stability is different when the ac-dc stage or dc-ac stage is operated as a BVCC or a BCCC. Specifically, only when the ac-dc stage is operated as a BVCC, the system is unstable; while for other cases, the system is certainly stable. For the applications where the ac-dc stage is operated as a BVCC, a virtual resistor is introduced and realized by the control scheme of the SHCC to ensure the system stability. Finally, a two-stage single-phase PFC ac-dc converter is fabricated and tested to verify the theoretical analysis.

Suppression of Line Frequency Instabilities in PFC AC-DC Power Supplies by Feedback Notch Filtering the Pre-Regulator Output Voltage

Due to nonlinear effects, Power Factor Correction (PFC) ac-dc converters working in Continuous Conduction Mode (CCM) can exhibit nonlinear phenomena such as subharmonic oscillations and chaotic regimes at the line frequency. These undesirable behaviors increase the Total Harmonic Distortion (THD) and shift the dc input line current to non null values. This results in a malfunctioning of the system or even damages caused by the increase of the temperature which can jeopardize enormously the performances and shorten the lifetime of the system. In order to avoid these problems, subharmonic line frequency instabilities must be suppressed. In this paper, a selective notch filter based controller is combined with the output voltage compensator to suppress these instabilities and to stabilize a two-stage PFC ac-dc converter. A frequency domain analysis is used to explain the control mechanism of directing subharmonic and chaotic oscillations into stable periodic motion. A detailed study of the effect of this selective filter on the dynamical behavior of the system is presented. A simple harmonic model is used to obtain the control stability domain. This control technique is simple and allows widening the stability domain and improving the performances of the system being its experimental implementation possible using standard devices such as OAs and passive elements. The correctness of the proposed technique is verified with numerical simulations and experimental measurements.

Period-doubling bifurcation in two-stage power factor correction converters using the method of incremental harmonic balance and Floquet theory

In this paper, period-doubling bifurcation in a two-stage power factor correction converter is analyzed by using the method of incremental harmonic balance (IHB) and Floquet theory. A two-stage power factor correction converter typically employs a cascade configuration of a pre-regulator boost power factor correction converter with average current mode control to achieve a near unity power factor and a tightly regulated post-regulator DC—DC Buck converter with voltage feedback control to regulate the output voltage. Based on the assumption that the tightly regulated post-regulator DC—DC Buck converter is represented as a constant power sink and some other assumptions, the simplified model of the two-stage power factor correction converter is derived and its approximate periodic solution is calculated by the method of IHB. And then, the stability of the system is investigated by using Floquet theory and the stable boundaries are presented on the selected parameter spaces. Finally, some experimental results are given to confirm the effectiveness of the theoretical analysis.

Asymptotic Slow-Scale Stability Boundary of PFC AC–DC Power Converters: Theoretical Prediction and Experimental Validation

A unified approach for the stability analysis of both preregulator and two-stage power factor correction (PFC) ac–dc converters is presented. Practical and accurate analytical expressions for the stability boundary are obtained by studying the dynamics of the first harmonic component. The resulting model of this dynamics has an equilibrium point at the origin of the harmonic state space. In the case of a stable equilibrium point, the first-order component converges to zero, and the system oscillates at twice the line frequency. If the equilibrium point loses stability, another equilibrium point depending on high-order harmonics will be reached while the real system will exhibit a period-doubling phenomenon leading to subharmonic oscillations. It is demonstrated that the stability boundaries depend on the power level. Numerical simulations and experimental results in both a preregulator and a complete two-stage PFC converter validate the approach.

Research on Soft Switching Power Supply with High Power Factor Based on Boost Converter

With the development of power electronics，the technology of Switching Mode Power Supply(SMPS) is gradually perfected. However，there is no end to the demand for a high power and high performance power supply. Nowadays, Power Factor Correction (PFC) technique is widely researched. This paper mainly analyzes the fundamental configuration of the switching power supply. And we study the basic structure and the operating principles of ZVT-boost soft-switching PFC circuit and the implementing principle of soft switch. For the power requirements, the two-stage PFC circuit is used. The forward stage is a single-phase Boost Power Factor Correction circuit and the backward stage main circuit is a full-bridge converter with the phase-shifting control soft-switching technique. Finally the simulating analysis is performed to the designed system.

Intermediate-scale instability in two-stage power-factor correction converters

Intermediate-scale instability is investigated for two-stage power-factor correction (PFC) converters, which are practical and popular design solutions for medium-to-high power applications. The circuits employ a cascade configuration of a pre-regulator Boost PFC converter with an average current mode control to achieve a near unity power factor and a post-regulator DC–DC Buck converter with a voltage feedback control to regulate the output voltage. The intermediate-scale instability manifests itself as local oscillations within a line cycle, whose oscillation frequency is between the line frequency and the switching frequency. Based on the assumptions that the rectified line voltage can be represented by its root mean square value and the post-regulator DC–DC Buck converter can be considered as a constant power sink, the small-signal model is established, and the underlying mechanism of such intermediate-scale instability is studied further. Finally, experimental results are given for the verification of analytical results.

Analysis and design of a single-phase hybrid mode power factor correction converter

Two-stage power factor correction (PFC) configuration usually suffers from low conversion efficiency due to twice power processing. Detailed analysis and operations of a hybrid mode PFC pre-regulator which employs both active and passive PFC techniques at different time slots are presented. The approach can achieve high power conversion efficiency, as well as low output voltage stresses on switch and bulk capacitor. Furthermore, analyses of PF and losses of components with the circuit inductance are also discussed. Experiments were performed to verify the effectiveness of the approach.