Two-level Adaptive Predictors Research Articles

An experimental study of sorting and branch prediction

Sorting is one of the most important and well-studied problems in computer science. Many good algorithms are known which offer various trade-offs in efficiency, simplicity, memory use, and other factors. However, these algorithms do not take into account features of modern computer architectures that significantly influence performance. Caches and branch predictors are two such features and, while there has been a significant amount of research into the cache performance of general purpose sorting algorithms, there has been little research on their branch prediction properties. In this paper, we empirically examine the behavior of the branches in all the most common sorting algorithms. We also consider the interaction of cache optimization on the predictability of the branches in these algorithms. We find insertion sort to have the fewest branch mispredictions of any comparison-based sorting algorithm, that bubble and shaker sort operate in a fashion that makes their branches highly unpredictable, that the unpredictability of shellsort's branches improves its caching behavior, and that several cache optimizations have little effect on mergesort's branch mispredictions. We find also that optimizations to quicksort, for example the choice of pivot, have a strong influence on the predictability of its branches. We point out a simple way of removing branch instructions from a classic heapsort implementation and also show that unrolling a loop in a cache-optimized heapsort implementation improves the predicitability of its branches. Finally, we note that when sorting random data two-level adaptive branch predictors are usually no better than simpler bimodal predictors. This is despite the fact that two-level adaptive predictors are almost always superior to bimodal predictors, in general.

High-performance embedded branch predictor by combining branch direction history and global branch history

To achieve higher performance in embedded systems, recent embedded microprocessor cores have gradually taken to adopting the technologies of general high-performance microprocessor cores. In branch prediction techniques, usually, the embedded microprocessor cores have used simple bimodal branch predictors. That is, until now, most branch predictors in embedded processor cores have utilised the address of the branch instruction (program counter, PC), and recently some predictors in advanced embedded cores use dynamic branch predictor with global branch history (GBH).The authors suggest branch direction history (BDH) as a new component of the input vector for branch prediction. Additionally, a new embedded branch predictor is proposed, called direction–gshare predictor, which utilises BDH information, as an implementation example. In simulation parts, a neural network with three branch prediction input vectors (PC, GBH and BDH) is modelled and their actual impact upon the branch prediction accuracy is analysed. Then, the new embedded branch predictor, the direction–gshare predictor is simulated. The simulation results show that the aliasings in pattern history table are reduced, 48.9% on average, by the additional use of BDH information. Moreover, the direction–gshare predictor outperforms previous embedded branch predictors, such as bimodal predictor, two-level adaptive predictor and gshare predictor, up to 15.32%, 5.41% and 5.74%, respectively.

The Impact of Branch Direction History Combined with Global Branch History in Branch Prediction

Most branch predictors use the PC information of the branch instruction and its dynamic Global Branch History (GBH). In this letter, we suggest a Branch Direction History (BDH) as the third component of the branch prediction and analyze its impact upon the prediction accuracy. Additionally, we propose a new branch predictor, direction-gshare predictor, which utilizes the BDH combined with the GBH. At first, we model a neural network with (PC, GBH, and BDH) and analyze their actual impact upon the branch prediction accuracy, and then we simulate our new predictor, the direction-gshare predictor. The simulation results show that the aliasing in Pattern History Table (PHT) is significantly reduced by the additional use of BDH information. The direction-gshare predictor outperforms bimodal predictor, two-level adaptive predictor and gshare predictor up to 15.32%, 5.41% and 5.74% respectively, without additional hardware costs.

Two-level branch prediction using neural networks

Dynamic branch prediction in high-performance processors is a specific instance of a general time series prediction problem that occurs in many areas of science. Most branch prediction research focuses on two-level adaptive branch prediction techniques, a very specific solution to the branch prediction problem. An alternative approach is to look to other application areas and fields for novel solutions to the problem. In this paper, we examine the application of neural networks to dynamic branch prediction. We retain the first level history register of conventional two-level predictors and replace the second level PHT with a neural network. Two neural networks are considered: a learning vector quantisation network and a backpropagation network. We demonstrate that a neural predictor can achieve misprediction rates comparable to conventional two-level adaptive predictors and suggest that neural predictors merit further investigation.