Two-dimensional Carrier Profiling Research Articles

Two-Dimensional Carrier Profiling on Lightly Doped n-Type 4H-SiC Epitaxially Grown Layers

Electronically active dopant profiles of epitaxially grown n-type 4H-SiC calibration layer structures with concentrations ranging from 3.1015 cm-3 to 1·1019 cm-3 have been investigated by non-contact Scanning Probe Microscopy (SPM) methods. We have shown that Kelvin Probe Force Microscopy (KPFM) and Electrostatic Force Microscopy (EFM) are capable of resolving two-dimensional carrier maps in the low doping concentration regime with nanoscale spatial resolution. Furthermore, different information depths of this wide band gap semiconductor material could be assessed due to the inherent properties of each profiling method. We additionally observed a resolution enhancement under laser illumination which we explain by reduced band-bending conditions. To gauge our SPM signals, we utilized epitaxially grown layers which were calibrated, in terms of dopant concentration, by C-V measurements.

Two-dimensional carrier mapping at the nanometer-scale on 32 nm node targeted p-MOSFETs using high vacuum scanning spreading resistance microscopy

This work presents the properties and applications of high vacuum scanning spreading resistance microscopy (HV-SSRM) for two-dimensional carrier profiling. Characteristics of this concept in terms of spatial resolution and dopant gradient resolution as well as in terms of concentration sensitivity and quantification procedures are briefly presented. Insight in process optimization and junction engineering is demonstrated by linking the carrier profiles extracted from HV-SSRM technique with electrical device characteristics for a laser-only annealed p-MOSFET lot targeting the 32nm node.

Quantitative Two-Dimensional Carrier Mapping in Silicon Nanowire-Based Tunnel-Field Effect Transistors Using Scanning Spreading Resistance Microscopy

AbstractThe successful implementation of silicon nanowire (NW)-based tunnel-field effect transistors (TFET) critically depends on gaining a clear insight into the quantitative carrier distribution inside such devices. Therefore, we have developed a method based on scanning spreading resistance microscopy (SSRM) which allows quantitative two-dimensional (2D) carrier profiling of fully integrated NW-based TFETs with 2 nm spatial resolution. The keys in our process are optimized NW cleaving and polishing steps, in-house fabricated diamond tips with ultra-high resolution, measurements in high-vacuum and a dedicated calibration procedure accounting for dopant dependant carrier mobilities.

Sub-nanometer Two-Dimensional Carrier Profiling in Silicon MOS Technologies Using High Vacuum Scanning Spreading Resistance Microscopy.

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Two-Dimensional Carrier Profiling by Kelvin-Probe Force Microscopy

This paper reports the two-dimensional (2-D) carrier/dopant profiling technique by Kelvin-probe force microscopy (KFM). Before surface potential was measured, a feedback control circuit was used to improve signal response speed. The effect of surface treatment on the contrast in surface potential images was studied. Then the correlation between surface potential difference measured by KFM and surface carrier/dopant concentration obtained by spreading resistance profiling, the capacitance–voltage method, and secondary ion mass spectroscopy analysis was established. On the basis of these results, the carrier depth profiling of a p–n junction and the detection of a p–n junction array with small pitch have been successfully demonstrated.

Impact of the environmental conditions on the electrical characteristics of scanning spreading resistance microscopy

Within this study, the authors have investigated scanning spreading resistance microscopy (SSRM) measurements on silicon samples under different environmental conditions. The authors have mainly focused on the possibility to reduce the required force for obtaining a stable electrical contact between the probe and the sample, and to improve the reproducibility of the technique by cleaving and measuring the samples in a controlled ambient. The authors demonstrate that, by measuring samples that were cleaved and maintained in nitrogen (N2) ambient, the force needed for a stable electrical contact between the probe and the sample was reduced by more than a factor of 3 when compared to the force required in air. This leads to an improved signal to noise ratio and enhanced reproducibility with remaining variations now below 10% for n-type as well as p-type samples. At the same time, tip requirements are relaxed and tip lifetime is improved. Our work has demonstrated that in situ SSRM is a very good candidate to fulfill the stringent ITRS requirements for two-dimensional carrier profiling.

High-resolution characterization of ultrashallow junctions by measuring in vacuum with scanning spreading resistance microscopy

The spatial resolution of scanning spreading resistance microscopy has been limited by using conventional probes when measuring in air. Sufficient electric contact of a probe-sample has been difficult to obtain in air due to the existence of moisture/contamination. Two-dimensional carrier profiling of nanoscale silicon devices is performed in a vacuum with conventional probes, and a high spatial resolution is obtained. Ultrashallow junctions down to 10nm are measured accurately with high reproducibility. Experimental results show that a good electric contact between probe and sample is important for obtaining high spatial resolution.

Noncontact-mode scanning capacitance force microscopy towards quantitative two-dimensional carrier profiling on semiconductor devices

Scanning capacitance force microscopy (SCFM) is a promising tool for investigation of two-dimensional carrier density distribution on semiconducting devices. Its sensitivity is strongly dependent on the Q factor of the mechanical resonance mode of the cantilever. Therefore, measurement in vacuum is more appropriate for increasing the sensitivity. In this letter, the authors describe noncontact-mode (NC) SCFM which is combined with the frequency modulation detection method and its signal characteristics. The authors derived a quasiquantitative calibration curve which correlates to the amplitude signal in NC-SCFM to the dopant density. Using the calibration curve, the authors obtained a quasiquantitative two-dimensional dopant density distribution map on a cross-sectional transistor device.

Direct Evaluation of Gate Line Edge Roughness Impact on Extension Profiles in Sub-50-nm n-MOSFETs

In this paper, the impact of gate line edge roughness (LER) on two-dimensional carrier profiles in sub-50-nm n-MOSFETs was directly evaluated. Using scanning tunneling microscopy (STM), it was clearly observed that the roughness of extension edges induced by gate LER strongly depended on the implanted dose, pockets, and coimplantations. Impurity diffusion suppressed by a nitrogen (N) coimplant enhanced the roughness of the extension edges, which caused fluctuations in the device performance. The expected effect based on the carrier profiles measured by STM of the N coimplant on the electrical performance of the n-MOSFETs was verified.

Two-dimensional carrier profiling on operating Si metal-oxide semiconductor field-effect transistor by scanning capacitance microscopy

We developed scanning probe microscopy procedures for simultaneous measurements of device characteristics and two-dimensional (2D) carrier distribution on operating cross-sectioned semiconductor devices in order to investigate their operating or failure mechanisms. Usually one cannot operate semiconductor device in a chip once the chip was cleaved and polished to expose its cross-sectioned surface because of lost electrical connections to the device. Here we employed a focused ion beam (FIB) apparatus for etching contact holes and fabricating additional electrical connections to the device by chemical vapor deposition (CVD) method. FIB-CVD is capable of fabricating three-dimensional wirings toward each electrode in a specific device. We prepared a cross-sectioned metal-oxide semiconductor field-effect-transistor sample with external tungsten wirings for device operation and performed scanning capacitance microscopy observations for dynamic 2D carrier distribution mapping on this sample.

Direct Measurement of Offset Spacer Effect on Carrier Profiles in Sub-50 nm p-Metal Oxide Semiconductor Field-Effect Transistors

We have directly measured the effect of the bottom shape in the offset spacer on the two-dimensional (2-D) carrier profiles of the sub-50 nm p-metal oxide semiconductor field-effect transistors (MOSFETs). It has been observed that the doping profile of the Sb pocket implanted with a high angle tilt is very sensitive to the bottom shape of the notched offset spacer. It has been confirmed that the Sb pocket deeply implanted leads to the decrease of 2 nm in the average overlap length of the extension region at a depth of 5 nm when the bottom shape is slightly upped at the notched offset spacer. The increased effective channel length is considered to enhance the dependence of the threshold voltage on the body bias voltage. Moreover, it is considered from the measured carrier profiles that the reduction in carrier concentration in the top channel region lowers the threshold voltage.

Scanning capacitance microscopy two-dimensional carrier profiling for ultra-shallow junction characterization in deep submicron technology

In this paper, we review our recent work to assess scanning capacitance microscopy (SCM) as a quantitative two-dimensional (2D) carrier profiling method on Si. SCM measurements on a wide variety of samples are discussed. In the case of unipolar Si samples (i.e. samples with a unique majority carriers type) the reliability of the method for quantification of the SCM raw data to carrier concentration profiles has been demonstrated. Angle beveling sample preparation allows quantitative carrier profiling with unprecedented depth resolution (1 nm), as demonstrated on specially designed samples containing B-doped Si/Si 0.75Ge 0.25/Si quantum wells. Applications to the study of the dopant diffusion and electrical activation of low-energy implanted B in submicron areas (0.38 μm) are shown. In the case of bipolar Si samples (i.e. samples containing electrical junctions), the crucial issue of electrical junction position determination both on cross-section and on bevel is addressed. Applications to a cross-sectioned 0.35 μm n–p–n transistor characterization are shown.

Scanning capacitance force microscopy imaging of metal-oxide-semiconductor field effect transistors

We investigated two-dimensional carrier profiles in metal-oxide-semiconductor field effect transistors (MOSFETs) using scanning capacitance force microscopy (SCFM), which was based on electrostatic force detection. We successfully obtained clear contrasts on source, drain, and channel regions by contact-mode SCFM, which corresponded to their dopant concentrations. Furthermore, the contrast on the channel region was changed by applying dc offset voltage to the gate electrode. We also compared line profile obtained from the SCFM image with a dopant profile measured by secondary ion mass spectroscopy (SIMS).

Study of Gate Length Dependence of Two-dimensional Carrier Profile in N-FET by Scanning Tunneling Microscopy

We measured the two-dimensional carrier profiles of n-type field effect transistors (n-FETs) with various gate lengths (Lg) by scanning tunneling microscopy. The extension overlap and the distribution of the depletion layers were evaluated to clarify that the measured carrier profiles were consistent with the roll-off characteristic of corresponding transistors. The effect of a pocket implant on a long transistor appeared where the lateral depletion width was locally shorter than the vertical one. In the n-FET with a gate length less than 40 nm, the effect of the pocket impurities from the opposite side mainly appeared as a reduction in the extension overlap in the deep region. Although the presence of this pocket increased the top channel concentration, the short length of the effective channel resulted in the spread of the depletion layer in the deep-channel region via the two-dimensional effect.

Application of a self-sensing conductive probe for Si device imaging

For the evaluation of two-dimensional carrier profiles in semiconductor devices, we have developed a novel form of probe–sensor combined unit that uses an etched tungsten wire as a conductive probe, and commercially available quartz tuning fork as the force sensor. This unit has a self-sensing capability due to the piezoelectric effect of quartz tuning fork, thus obviating optical setup, and its conductivity is higher and more stable than that of conventional metal-coated Si cantilever. In addition, this probe–sensor combined unit is inexpensive and easy to use, when compared to the well-known optical methods of Si-based cantilever vibration detection system. Our scanning probe microscope using this probe–sensor combined unit is able to mapping the capacitive gradient signal (dC/dZ image) and internal damping of quartz tuning fork oscillation (dissipation image) while scanning the sample surface. In this letter, we show the results of visualization of the p–n junction locus of a Si metal–oxide–semiconductor field effect transistor in both dC/dZ and dissipation images.

Two-dimensional characterization of carrier concentration in metal-oxide-semiconductor field-effect transistors with the use of scanning tunneling microscopy

An evaluation technique for two-dimensional (2D) carrier profiles in metal-oxide-semiconductor field-effect transistors (MOSFETs) is presented that is based on the use of scanning tunneling microscopy (STM). First, the procedure of STM-based carrier profiling method is presented. Sample preparation that enables accurate carrier measurements is described. It is shown that STM has both the spatial resolution and sensitivity of tunneling current to carrier concentration enough to evaluate the carrier profile in an aggressively scaled device. The conversion method from obtained images into carrier profiles is described. Next, the STM-based technique is used to evaluate two-dimensional carrier profiles in the extension regions of 70 nm n-MOSFETs. The dependence of 2D carrier profiles in the extension regions where arsenic is implanted at an energy of 3 keV on the implantation dose and annealing temperature is investigated. STM is a powerful tool for the efficient development of scaled Si devices.

Analysis of the two-dimensional-dopant profile in a 90 nm complementary metal–oxide–semiconductor technology using scanning spreading resistance microscopy

In this study we demonstrate the capabilities of scanning spreading resistance microscopy (SSRM), which is an atomic force microscope based technique, for two-dimensional (2D) carrier profiling with nanometer spatial resolution, high quantification accuracy, and high concentration sensitivity. As a test vehicle we discuss the application of SSRM on devices obtained from a 90 nm node complementary metal–oxide–semiconductor technology. Transistors processed in this technology, and with poly-gate lengths down to 70 nm have been analyzed using SSRM. Dedicated quantification software has been used to calculate carrier concentration profiles. The source/drain implants and the halo- and threshold voltage adjustment implants have been analyzed for different gate sizes in order to understand their impact on the 2D channel carrier profile. The SSRM results have been compared to the results of calibrated process simulators.

Progress towards a physical contact model for scanning spreading resistance microscopy

As emphasized in the ITRS roadmap, two-dimensional (2D) carrier profiling is one of the key elements in support of technology development. For CMOS silicon devices, scanning spreading resistance microscopy (SSRM) has demonstrated an attractive spatial resolution and concentration sensitivity. The automated construction of calibration curves allows for the fast semi-quantitative transformation of one-dimensional (1D) and 2D resistance profiles/images into resistivity/carrier profiles/images. However in order to arrive, at a reliable, fully quantitative analysis a new physical contact model involving a Schottky-like contact with tunneling and surface states has been proposed. The latter has been based on establishing a qualitative agreement with experimental data. The first aim of this work is to refine this contact model in order to achieve a quantitative agreement between device simulations (with ISE/DESSIS) and experimental 1D profiles on well-calibrated, junction isolated (carrier spilling affected), sub-micron CMOS structures. Among others, scanning spreading resistance spectroscopy (SSRS), i.e. collecting a full I–V curve at each data point, will be used. Furthermore, the impact of this new contact model on the deconvolution procedure from the measured resistance profiles/images towards resistivity/carrier profiles/images through an improved correction factor database will be discussed.

Sub-5-nm-spatial resolution in scanning spreading resistance microscopy using full-diamond tips

Scanning spreading resistance microscopy is a two-dimensional carrier profiling technique now widely used for the characterization of silicon (Si) devices as well as other semiconductor materials. Whereas the state-of-the-art spatial resolution for this technique using commercial-diamond-coated silicon probes is limited to 10–20 nm, enhanced resolution is demonstrated through the use of full-diamond tips integrated in Si cantilevers. Sub-5-nm-spatial resolution is obtained on fully depleted silicon on isolator devices, putting the technique closer to the characterization requirements of the forthcoming semiconductor dimensions. Resistance and scanning electron microscope measurements clearly show that this enhanced resolution results from a smaller effective radius for full diamond tips as compared to the diamond-coated Si probes.

Comparison of experimental and theoretical scanning capacitance microscope signals and their impact on the accuracy of determined two-dimensional carrier profiles

The accuracy with which two-dimensional carrier profiles can be extracted from scanning capacitance microscopy (SCM) images of doped structures in silicon depends on the model used to interpret the SCM differential capacitance data. This work validates models of the SCM by comparing the calculated SCM signal to the measured signal for a variety of sample parameters, measurement conditions, and capacitance sensors from different manufacturers. The magnitude of the capacitance sensor high-frequency voltage is measured and its effect on ΔC–V curves and extracted carrier profiles is quantified. Two nonidealities commonly observed in SCM signals, U-shaped C–V curves and double zero crossing in the SCM signal at the p–n junctions, are related to the measurement parameters and explained.