TTL Levels Research Articles

Novel voltage Multiplier/Divider-based active square law detector for heartbeat measurement

This paper describes a novel active voltage detector that is capable of processing analog signals with levels from units of mV up to 250 mV. An advantage of the proposed circuit is that the relationship between output voltage and input level is not linear but quadratic, which increases the sensitivity when processing low-level signals. The presented solution has tuning parameters for correction or intentional shift of internal DC offset and electronic control of the output signal gain level. The application example presents detection of beats per minute (BPM) in the range of 6–300 BPM, which corresponds to a frequency range of 0.1–5 Hz. The advantage of the presented solution is that the output of the circuit is directly a digital signal compatible with TTL levels, so there is no need for any analog to digital converter to produce a digital signal for further processing.

The pathogenic role of tubulin tyrosine ligase and D2 tubulin in Alzheimer's disease.

Neurons possess both stable and dynamic microtubules (MTs), and regulation of the balance between these two states is critical to avoid disease. Post-translational modifications (PTMs) of tubulin can alter MT stability. We have preliminary evidence indicating that premature MT longevity and accumulation of D2 tubulin, a tubulin PTM associated with long-lived and hyperstable MTs, play a pathogenic role in AD. D2 tubulin is derived from the cleavage of the last two residues of alpha-tubulin by the sequential actions of VASH1/2 and the CCP family of tubulin carboxypeptidases. De-tyrosinated tubulin, lacking just one terminal residue, can be returned to its original, tyrosinated state by TTL, a rate-limiting enzyme. Immunoblot analyses of TTL and D2 levels were carried out on frozen human hippocampal tissue. Western blot and microtubule dynamics experiments were performed on human cortical neurons derived from iPSC lines in which the London familial APP mutation V717I was knocked into one allele of the IMR90 control backbone using CRISPR/Cas9 technology to mimic fAD. Lentiviral infection with cDNA shRNA against TTL was used on primary rat hippocampal cultures. Spine density and morphology was quantified by DioListic labelling prior to imaging and reconstruction. We found that levels of TTL were decreased in lysates from AD brains compared to age-matched controls and that, in contrast, D2 tubulin was significantly higher in the AD brains. In the APP London cortical neurons, which accumulate amyloid beta(1-42) and hyperphosphorylated tau in an age-dependent manner, TTL levels again decreased while D2 tubulin increased. We examined whether these changes correlated with an increase in MT stability by measuring MT dynamics and found that in the APP London line, dynamic MTs demonstrated decreased catastrophe frequency and longer comet lifetimes, conditions that are compatible with MT hyperstabilization. We found that depletion of TTL expression in rat hippocampal cells promoted accumulation of D2 tubulin and caused dendritic spine loss. Together, our results indicate that loss of TTL and accompanying accumulation of D2 tubulin are hallmarks of both sporadic and familial AD and that loss of MT dynamicity is a feature of familial AD that may contribute to synapse loss and disease progression.

In situ observation of new particle formation (NPF) in the tropical tropopause layer of the 2017 Asian monsoon anticyclone – Part 1: Summary of StratoClim results

Abstract. During the monsoon season of the year 2017 the airborne StratoClim mission took place in Kathmandu, Nepal, with eight mission flights of the M-55 Geophysica in the upper troposphere–lower stratosphere (UTLS) of the Asian monsoon anticyclone (AMA) over northern India, Nepal, and Bangladesh. More than 100 events of new particle formation (NPF) were observed. In total, more than 2 h of flight time was spent under NPF conditions as indicated by the abundant presence of nucleation-mode aerosols, i.e. with particle diameters dp smaller than 15 nm, which were detected in situ by means of condensation nuclei counting techniques. Mixing ratios of nucleation-mode particles (nnm) of up to ∼ 50 000 mg−1 were measured at heights of 15–16 km (θ ≈ 370 K). NPF was most frequently observed at ∼ 12–16 km altitude (θ ≈ 355–380 K) and mainly below the tropopause. Resulting nnm remained elevated (∼ 300–2000 mg−1) up to altitudes of ∼ 17.5 km (θ ≈ 400 K), while under NPF conditions the fraction (f) of sub-micrometre-sized non-volatile residues (dp > 10 nm) remained below 50 %. At ∼ 12–14 km (θ ≈ 355–365 K) the minimum of f (< 15 %) was found, and underneath, the median f generally remains below 25 %. The persistence of particles at nucleation-mode sizes is limited to a few hours, mainly due to coagulation, as demonstrated by a numerical simulation. The frequency of NPF events observed during StratoClim 2017 underlines the importance of the AMA as a source region for UTLS aerosols and for the formation and maintenance of the Asian tropopause aerosol layer (ATAL). The observed abundance of NPF-produced nucleation-mode particles within the AMA is not unambiguously attributable to (a) specific source regions in the boundary layer (according to backward trajectory analyses), or (b) the direct supply with precursor material by convective updraught (from correlations of NPF with carbon monoxide), or (c) the recent release of NPF-capable material from the convective outflow (according to air mass transport times in the tropical tropopause layer, TTL). Temperature anomalies with ΔT of 2 K (peak-to-peak amplitude), as observed at a horizontal wavelength of ∼ 70–100 km during a level flight of several hours, match with NPF detections and represent an additional mechanism for local increases in supersaturation of the NPF precursors. Effective precursor supply and widely distributed temperature anomalies within the AMA can explain the higher frequency of intense NPF observed during StratoClim 2017 than all previous NPF detections with COPAS (COndensation PArticle counting System) at TTL levels over Brazil, northern Australia, or West Africa.

Blood markers of oxidative stress are strongly associated with poorer prognosis in colorectal cancer patients.

Oxidative stress has been implicated in the initiation of several cancers, including colorectal cancer (CRC). Whether it also plays a role in CRC prognosis is unclear. We assessed the associations of two oxidative stress biomarkers (Diacron's reactive oxygen metabolites [d-ROMs] and total thiol level [TTL]) with CRC prognosis. CRC patients who were diagnosed in 2003 to 2012 and recruited into a population-based study in Germany (n = 3361) were followed for up to 6 years. Hazard ratios (HRs) and 95% confidence intervals (95% CIs) for the associations of d-ROMs and TTL (measured from blood samples collected shortly after CRC diagnosis) with overall survival (OS) and disease-specific survival (DSS) were estimated using multivariable Cox regression. Particularly pronounced associations of higher d-ROMs with lower survival were observed in stage IV patients, with patients in the highest (vs lowest) tertile having much lower OS (HR = 1.52, 95% CI = 1.14-2.04) and DSS (HR = 1.61, 95% CI = 1.20-2.17). For TTL, strong inverse associations of TTL with mortality were observed within all stages. In patients of all stages, those in the highest (vs lowest) quintile had substantially higher OS (HR = 0.48, 95% CI = 0.38-0.62) and DSS (HR = 0.52, 95% CI = 0.39-0.69). The addition of these biomarkers to models that included age, sex, tumor stage and subsite significantly improved the prediction of CRC prognosis. The observed strong associations of higher d-ROMs and lower TTL levels with poorer prognosis even in stage IV patients suggest that oxidative stress contributes significantly to premature mortality in CRC patients and demonstrate a large potential of these biomarkers in enhancing the prediction of CRC prognosis beyond tumor stage.

Interfacing TTL and CMOS Logic Levels in the Laboratory

ABSTRACT Interconnectivity of electrical components, such as triggers and detectors, is intrinsic to operating time-sensitive experiments. As labs become more digitized, equipment integration and compatibility become larger factors in experimental setups. Complications can arise when instruments with different signal levels, or logic levels, are integrated because each instrument requires its own particular input signal, with a specific threshold voltage, to function. When incorrect logic levels are used or the delays in conversion are too long, these instruments are not properly triggered and the experiment becomes inoperable. To perform multi-component, time-sensitive experiments, a logic-level converter with minimal time delays is necessary. Commercial solutions, however, are not viable when the nature of the experiment is highly time-sensitive, such as in laser spectroscopy, because the delay on the signal conversion is several hundred nanoseconds and would result in missed events. In this paper, three different logic-level converter circuits are presented for conversion between the TTL and CMOS logic levels, the most commonly used logic levels in experimental applications, based on the concept of an emitter follower design that only produces a delay in the tens of nanoseconds. Circuits were developed for conversion from CMOS to TTL, from TTL to CMOS, and a TTL buffer circuit. These circuits allow for inter-conversion between the two most common logic families, TTL and CMOS, as well as buffering weak signals, to offer a simple, low-cost solution to synchronization in time-sensitive experimental setups.

Diminished Arylesterase Enzyme Activity and Total Thiol Levels in Bladder Cancer Patients

It is difficult to think of a disease in the etiology of which free radicals would not be involved. The human body has a number of endogenous free-radical scavenging systems to avoid harm that can lead to any disease including cancer. This study aims to measure the total anti-oxidative status (TAS), in particular the activities of HDL-associated anti-oxidative enzymes paraoxonase (PON1), arylesterase (ARE), and total thiol levels (Ttl) in bladder cancer (BC) patients for the first time in literature. Forty two male patients (mean age, 66.6 +/- 12.7 years) with BC who had presented at the Urology Outpatient Clinic were prospectively included in the study. Forty age- and gender-matched healthy control subjects (mean age 65 +/- 7.4 years) were also enrolled for comparison. Analysis of PON1, ARE activities, measurement of TAS, and Ttl of serum were carried out using colorimetric measurement methods. Statistical analyses were performed using the MedCalc statistical software program. ARE enzyme activity and Ttl levels were significantly lower in patients with BC compared to controls (p = 0.03; p = 0.02, respectively), whereas PON1 enzyme activity and TAS did not show significant differences. Ttl levels were lower in patients with a high grade cancer compared to those with a low grade cancer (p = 0.03). Anti-oxidant measurements might be essential in routine clinical use, not only as cancer disease markers but also as major actors in the management of anti-oxidant remedies in the very near future. Our findings showed that determination of ARE enzyme activity and Ttl levels were more precise than PON1 enzyme activity or TAS measurements, particularly in BC patients. When composing a marker panel, it should be kept in mind that determination of anti-oxidant levels based merely on TAS or PON1 activity may be deceptive and must include ARE enzyme activity and/or Ttl measurements. However, long-term clinical studies are needed to clarify the pathophysiological role of serum anti-oxidative levels and HDL-associated PON1 activity in BC patients.

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95/05446 Comparison of sample preparation methods for the spectrophotometric determination of phosphorus in soil and coal fly ash

The integration of submicron poly-emitter transistor technology with CMOS devices, scaled down to 0·8 μm, to enhance the operating performance of BiCMOS ASICs in the GHz range, is described. It enables incorporation of npn, NMOS and PMOS transistors, Schottky diodes, polysilicon resistors and lateral fuses. The proposed process can facilitate CMOS, TTL and ECL signal levels on the same chip. To make the process more consistent and easy, the 19 masking steps are incorporated; most of them are noncritical oversized implant masks. N+ and P+ buried twin wells are formed for low isolation spacings along with their respective N and P epitaxial layers, to eliminate latchup susceptibility.The process includes some special features to increase the layout density and to reduce the parasitic capacitances. This is achieved by using sidewall spacers for polysilicon, self aligned vertical npn transistor structures and undoped polysilicon trench isolations. To obtain high fT (cut-off frequency) in the npn bipolar transistor, P+ poly base, N+ poly emitter and shallow junctions are incorporated. Titanium salicidation of N+ and P+ polysilicon is proposed while, on the source-drain of MOS transistors, a 20 nm thick TiW barrier layer deposition is added. A multilayer interconnect technology is employed with tungsten plugging and gold metallization.The 125-step process has been simulated for oxidation, impurity drive-in schedules and 12 implantation schemes in order to optimize various impurity profiles. The 60 nm emitter junction depth and 160 nm base width have been controlled by mixed boron and arsenic ion implantation through a poly-emitter window. The profile of an npn bipolar device, generated by process simulator (SUPREM), is directly provided to the device simulator (SEDAN) to find various important dc characteristics. The calculated fT and early voltage of the bipolar device were more than 7 GHz and 17 V respectively. For ac analysis of the above device, an inhouse-made high-speed transistor package (HIBTRA) has been used to explain the sinusoidal and transient behaviour of the device.The submicron MOS devices have been first simulated on an inhouse device simulator (MOSKIT) to determine their characteristics such as drain current, subthreshold current, substrate current and also to compute various MOS parameters required for circuit simulation and threshold voltage adjustment implantation doses.

Process integration, architecture and simulation of a GHz-BiCMOS ULSI technology

The integration of submicron poly-emitter transistor technology with CMOS devices, scaled down to 0·8 μm, to enhance the operating performance of BiCMOS ASICs in the GHz range, is described. It enables incorporation of npn, NMOS and PMOS transistors, Schottky diodes, polysilicon resistors and lateral fuses. The proposed process can facilitate CMOS, TTL and ECL signal levels on the same chip. To make the process more consistent and easy, the 19 masking steps are incorporated; most of them are noncritical oversized implant masks. N + and P + buried twin wells are formed for low isolation spacings along with their respective N and P epitaxial layers, to eliminate latchup susceptibility. The process includes some special features to increase the layout density and to reduce the parasitic capacitances. This is achieved by using sidewall spacers for polysilicon, self aligned vertical npn transistor structures and undoped polysilicon trench isolations. To obtain high f T (cut-off frequency) in the npn bipolar transistor, P + poly base, N + poly emitter and shallow junctions are incorporated. Titanium salicidation of N + and P + polysilicon is proposed while, on the source-drain of MOS transistors, a 20 nm thick TiW barrier layer deposition is added. A multilayer interconnect technology is employed with tungsten plugging and gold metallization. The 125-step process has been simulated for oxidation, impurity drive-in schedules and 12 implantation schemes in order to optimize various impurity profiles. The 60 nm emitter junction depth and 160 nm base width have been controlled by mixed boron and arsenic ion implantation through a poly-emitter window. The profile of an npn bipolar device, generated by process simulator (SUPREM), is directly provided to the device simulator (SEDAN) to find various important dc characteristics. The calculated f T and early voltage of the bipolar device were more than 7 GHz and 17 V respectively. For ac analysis of the above device, an inhouse-made high-speed transistor package (HIBTRA) has been used to explain the sinusoidal and transient behaviour of the device. The submicron MOS devices have been first simulated on an inhouse device simulator (MOSKIT) to determine their characteristics such as drain current, subthreshold current, substrate current and also to compute various MOS parameters required for circuit simulation and threshold voltage adjustment implantation doses.

A 20 K GaAs array with 10 K of embedded SRAM

A 20000-gate GaAs array with 10 K of embedded RAM is presented. The array contains eight scannable fully registered 256*256 RAM macros which have a minimum cycle time of 3.5 ns. The RAM features a scan mode, which can be used to configure the registers into a serial shifter. There is also a RAM test mode which allows independent functional and speed testing of all eight RAMs, easing the task of RAM verification for a given user personalization. The RAM array was fabricated using an advanced high-performance GaAs semiconductor E/D MESFET process featuring self-aligned gates and requiring only 12 masks. Introductory discussion of the Vitesse GaAs process, basic GaAs MESFET characteristics, and GaAs circuit design are provided. The gate array portion contains 20736 user-configurable cells with 10-ps gate delays which are tailored for direct-coupled FET logic (DCFL). The I/O can be personalized for ECL, TTL, or GaAs levels. There are 392 pads on the 13.8-mm*7.7-mm die with a maximum of 256 used for signal I/O. The RAM array is packaged in a multilayer ceramic 344-pin leaded chip carrier (LDCC). Typical power dissipation at 80% utilization is 14 W. >

High-dynamic-range AM detector for data logging applications

Linear detection of amplitude modulation over a dynamic range of 218 is achieved by an adaptive circuit which selects an appropriate gain. The gain range is available at TTL levels. The circuit is particularly useful for digital data logging applications where fast sampling over a wide dynamic range is required.

Design Considerations for a Bipolar 256-Bit Random Access Memory

The increasing use of computers and peripherals with higher speed capabilities generated a demand for a low cost, low power, high-speed memory which is directly compatible with TTL levels and drive requirements. Such a memory could be built into small local storage applications or into the main storage of a computer. The requirements of such a memory are summarized below: