Triple-push Oscillator Research Articles

225 GHz triple‐push RTD oscillator with 0.5 mW dc‐power consumption

This study reports on a sub-mW triple-push oscillator using resonant tunnelling diodes (RTDs) operating at a frequency of 225 GHz. The triple-push RTD oscillator is designed based on a stability test using even/odd-mode equivalent circuit models and fabricated by using an indium phosphide monolithic microwave integrated circuit process. The fabricated IC exhibits an extremely low dc-power consumption ( P DC ) of 0.5 mW with a dc-to-radio-frequency efficiency of 1%. These results are attributed to both device characteristics of the RTDs with a low bias voltage of 0.4 V and a low peak current density of 0.74 mA/μm 2 and an efficient triple-push topology exploiting the strong odd symmetry of the RTD I - V curve with a wide negative differential conductance voltage span of 0.46 V.

A 0.53-THz Subharmonic Injection-Locked Phased Array With 63-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math> </inline-formula>W Radiated Power in 40-nm CMOS

This paper presents a 0.53-THz subharmonic injection-locked 1 × 4 phased array based on an injection-locked oscillator (ILO) chain. Thanks to the ILO chain, the phase errors in the phased array can be compensated without introducing power variation. This technique enables accurate beam steering with a 60° scan range in the E-plane at 0.53 THz. A sixstage triple-push oscillator is proposed to generate the signal at 0.53 THz. Compared with a conventional triple-push oscillator, it reduces layout constraints, improves signal balance, and enhances output power by at least 3 dB. The phased array is implemented in 40-nm CMOS. With an injection power of 0 dBm, the injection-locked phased array generates an output frequency from 529 to 534 GHz. At 531.5 GHz, the proposed phased array achieves -12-dBm radiated power and 0.24 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sup> / <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">00</sub> dc-to-terahertz (THz) efficiency without the use of silicon lens, quartz superstrate, or substrate thinning. The chip consumes 260-mW dc power and occupies an area of 2.5 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

A 1.52 THz RTD Triple-Push Oscillator With a -Level Output Power

A resonant tunneling diode (RTD)-based oscillator operating at an output operation frequency of 1.52 THz is proposed. The proposed oscillator utilizes a unique negative differential conductance characteristic and a triple-push principle for high frequency operation. The RTD triple-push oscillator with an on-chip patch antenna has been successfully fabricated by using an InP-based RTD monolithic microwave integrated circuit (MMIC) technology. The fabricated RTD oscillator shows the output power of 1.9 μW at an output frequency of 1.52 THz. The obtained DC power consumption is 11.6 mW.

A 37.5-mW 8-dBm-EIRP 15.5&lt;formula formulatype="inline"&gt;&lt;tex Notation="TeX"&gt;$^{\circ}$&lt;/tex&gt;&lt;/formula&gt;-HPBW 338-GHz Terahertz Transmitter Using SoP Heterogeneous System Integration

A low-cost terahertz transmitter is proposed by using system-on-package (SoP) heterogeneous system integration. A signal source in 40-nm CMOS is integrated with an antenna array on a Benzocyclobutene carrier through a broadband low-loss terahertz interconnect. The signal source adopting triple-push oscillator topology is able to produce a differential output without any additional balun circuit. Hence, the power consumption and the chip area can be reduced. The antenna array containing 50 patch antennas is differentially excited to give simulated directivity, efficiency, and antenna gain as high as 22.6 dB, 88%, and 22 dBi, respectively, at 335 GHz. The terahertz interconnect employs a resonator coupling technique to provide low-loss and broadband performance while occupying a small area. Measured results show that the proposed terahertz transmitter can work at 338.4 GHz with equivalent isotropically radiated power (EIRP) of 8.0 dBm while consuming only 37.5 mW from a 1-V supply. The measured half-power beam-width can be as narrow as 15.5 $^{\circ}$ . The EIRP can be further raised to 9.5 dBm as the supply $V_{ DD}$ is increased to 1.3 V. The CMOS chip only occupies an area as small as 0.028 ${\hbox {mm}}^{2}$ . All of the design efforts enable the proposed terahertz transmitter to feature in small form factor, low power dissipation, low cost, and high performance. To the best of the authors' knowledge, this is the most compact, lowest power, lowest cost, and high-performance SoP-based terahertz transmitter reported thus far.

A 340 GHz Triple-Push Oscillator With Differential Output in 40 nm CMOS

A low-power triple-push oscillator with differential output is proposed in this letter. By extracting signals from the same current loop, the oscillator can naturally provide differential output without any additional active circuit or passive balun required. Therefore, the output power can be increased and the chip area and power consumption can be reduced. Realized in 40 nm CMOS technology, the proposed oscillator can oscillate at 340.6 GHz while providing equivalent isotropically radiated power (EIRP) as -21.8 dBm. The power consumption is only 34.1 mW from a 0.9 V supply. The oscillator core only occupies area of 0.028 mm 2 .

A 0.53 THz Reconfigurable Source Module With Up to 1 mW Radiated Power for Diffuse Illumination in Terahertz Imaging Applications

This paper presents a high-power 0.53 THz source module with programmable diversity to adjust the brightness and the direction of light to obtain the desired diffuse lighting conditions in THz imaging applications. The source module consists of a single SiGe BiCMOS chip which operates an array of 16 source-pixel incoherently. Each source pixel consists of a primary on-chip ring-antenna and two triple-push oscillators locked 180° out-of-phase. The module provides a total radiated power of up to 1 mW (0 dBm) with 62.5 μW (-12 dBm) per source pixel on average and an EIRP per pixel of 25 dBm. The circuit layout is scalable in size and output power. The chip consumes up to 2.5 W from a 2.4 V supply and 3.2 mW from a digital 1.2 V supply respectively. The module includes a secondary silicon lens, is programmable through a CPLD, and supplied from a USB port. The THz radiation can be recorded with a CMOS 1 k-pixel THz video camera and represent an all silicon solution for real-time active THz imaging.

Nonlinear Mode Analysis and Optimization of a Triple-Push Oscillator

The triple-push oscillator architecture is an attractive application of a three element coupled oscillator array for high frequency signal generation. The desired solution to combine the power at the third harmonic and reject the first and second harmonics requires a 120 phase shift among the system elements. However, depending on the coupling strength and delay between the oscillators, the phase distribution varies, giving rise to different operating modes. Harmonic balance analysis is used to trace these multiple coexisting modes and their stability is investigated using envelope transient simulation. A design methodology is presented where optimum coupling parameters guarantee the operation of the system in the desired mode. A 13.8 GHz triple push oscillator is fabricated, and the various modes are investigated verifying the analysis.

Frequency synthesiser architecture eliminating high speed frequency dividers for millimetre-wave applications

A frequency synthesiser architecture for millimetre-wave applications is proposed. The architecture is based on a triple-push oscillator, which functions both as a divider and oscillator. Thus, the proposed architecture eliminates the need for injection locked frequency dividers that are the main contributors to the limited tuning capability of millimetre-wave phase-locked loops. Since the proposed architecture is solely based on the performance of the triple-push oscillator, the measurement result of the first silicon triple-push oscillator at 30 GHz is presented to support the validity of the concept.

Design of push-push and triple-push oscillators for reducing 1/f noise upconversion

In this paper, 1/f noise upconversion in push-push and triple-push oscillators is studied, and the design requirements for minimizing 1/f noise upconversion are presented. In push-push oscillators, the presence of the large second harmonic components may degrade the waveform symmetry of the oscillation waveforms, leading to the significant 1/f noise upconversion. To minimize 1/f noise upconversion in push-push oscillators, the phases of Fourier coefficients of all harmonics need to be equal. In triple-push oscillators, the waveform symmetry can easily be achieved by eliminating all even harmonic components. The experimental results show that around 15-dB phase-noise improvement at 100-kHz offset frequency can be obtained by satisfying the waveform symmetry condition in push-push and triple-push oscillators.

Triple-push oscillator approach: theory and experiments

This paper presents the theory and experiments of the triple-push oscillator approach. This oscillator architecture is combined with three identical oscillator subcircuits. An analytical mode analysis is used to describe the behavior of all modes. As will be shown, odd-mode currents in each oscillator subcircuit have a 120/spl deg/ phase shift to one another and thus produce in-phase combining for the third harmonic. The time domain analysis was performed to simulate a triple-push oscillator, showing that the phenomenon of 120/spl deg/ phase shift exists among each oscillator subcircuit. To prove this concept, a 4.9-GHz hybrid bipolar junction transistor (BJT) circuit and a 28.4-GHz heterojunction bipolar transistor (BJT) MMIC chip were demonstrated. The measured results showed that the 4.9-GHz BJT triple-push oscillator delivered an output power of 1.0 dBm at 4.9 GHz with 12.0-dB fundamental rejection, and the 28.4-GHz HBT MMIC chip exhibited a measured center frequency at 28.4 GHz with an output power of -15.4 dBm, while the output powers of the fundamental and the second harmonic signals were suppressed to -21 and -34 dBm.