Trailing-edge Modulation Research Articles

A Unified Sampling Mechanism to Control Average and Peak Current in a Buck Converter Under Trailing-edge Modulation

A Unified Sampling Mechanism to Control Average and Peak Current in a Buck Converter Under Trailing-edge Modulation

Sampled-Data Modeling and Stability Analysis of Digitally Controlled Buck Converter With Trailing-Edge and Leading-Edge Modulations

For a digitally controlled dc–dc converter with leading-edge modulation or trailing-edge modulation, due to the delay and different sampled points, its nonlinear behavior and the magnitude-phase response in high frequency and low frequency cannot be accurately depicted by the averaged modeling method, but can be predicted by the sampled-data modeling method. However, the conventional sampled-data model is usually more complicated and less intuitive, which is not conducive to the presentation of physical meaning and the design of the controller for the converter. Based on the reasonable approximation of the sampled-data model, this article proposes a second-order global equivalent circuit for the buck converter with different modulations. Meanwhile, the small-signal model in the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">z</i> -domain based on the equivalent circuit is derived. Using the proposed equivalent circuit, the detailed operating waveform of the switching circuit of dynamic and stable state can be predicted without considering the ripple ratio of the state variables and the stability boundaries of various parameters of the system can be accurately analyzed, including the parasitic parameters. Furthermore, based on the stability analysis of the controller parameters, a proportional-integral-derivative controller is designed to verify the stability difference between the two modulation modes when the load steps. Finally, a prototype of the buck converter was constructed to verify the effectiveness of the model and theoretical analysis.

Digital Predictive Current-Mode Control for Asymmetrical Half-Bridge LED Constant-Current Driver

In this paper, we propose three advanced digital predictive current-mode control (DPCC) algorithms based on a simplified estimation method of duty cycle lost time for asymmetric half-bridge (AHB) LED constant-current driver. They are the digital predictive peak current mode control(DPPCC) algorithm based on leading-edge modulation, the digital predictive quasi-valley current mode control(DPqVCC) algorithm based on trailing-edge modulation, and the digital predictive quasi-average current mode control(DPqACC) algorithm based on double-edge modulation. Simulation and experimental results demonstrate that the three DPCC algorithms can effectively offset the effect of delay on digital control performance, which confirms the superiority of DPqACC. When the DPqACC is applied, the series-load-jump transition times are below 4.5 ms, the maximum load adjustment rate is 0.5%/ V, and the output current can be tuned continuously between 0.3 A and 4.5 A with the longest transition time of 1 ms. Moreover, the three DPCC algorithms are capable of compensating for low-frequency ripples due to the rapid regulation speed of the inner loop. With the electrolytic capacitance removed without additional ripple compensation, the maximum peak-to-peak value of the low-frequency secondary ripple is 0.1163 A (2.91%) when the input is 400 53sin(2ω <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>lin</i></sub> <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</i> ) V and the output is 4 A. This approach provides an excellent solution for the digital design of low-ripple AC-DC LED constant-current drivers without electrolytic capacitance.

Digital Valley V2 Control for Boost Converter With Fast Load-Transient Performance

To improve the load transient performance of boost converter, digital valley V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (DVV) control with trailing-edge modulation is proposed. After analysis of output voltage ripple of boost converter, the control law of DVV controlled boost converter in continuous conduction mode is derived in detail. And its stability is further analyzed and critical stability condition is also obtained by sampled-data modeling. The load transient performance of the system is studied and compared with conventional digital voltage-mode and digital peak current controlled boost converters. It is shown that the proposed DVV control for boost converter behaves the advantages of stable operation in the full-range duty cycle when the system satisfies the stability condition and fast load transient performance, which is validated by experimental results.

Approximate Discrete-Time Small-Signal Models of DC–DC Converters With Consideration of Practical Pulsewidth Modulation and Stability Improvement Methods

It is generally known that averaged models are inadequate in describing the effects of leading-edge and trailing-edge pulsewidth modulation (PWM) on the stability of dc–dc converters. In this paper, using discrete-time models of the buck, boost, and buck–boost converters and considering the effects of leading-edge and trailing-edge PWM, the general expressions of the duty-cycle-to-output-voltage transfer function, G vd( z ), in the discrete-time domain are derived. Based on the low-pass characteristics of the dc-dc converters and related properties of the matrix functions, approximate expressions of G vd in the frequency domain are derived, which are simple and accurate up to half the switching frequency. Using the approximate G vd, the stability of the three basic dc–dc converters under leading-edge and trailing-edge PWM is analyzed. It is shown that the stability of the buck converter is unaffected by the type of PWM, while the leading-edge modulated boost and buck–boost converters have better stability than the trailing-edge modulated ones. Since the trailing-edge modulation is commonly available in PWM controller integrated circuits, the modulation signal zero-order holding (ZOH) method and the inductor current feedback control method are proposed for use in the trailing-edge modulated boost and buck–boost converters to achieve the same effect of leading-edge modulated converters. Experimental buck and boost converters were constructed for verification of the accuracy of the proposed model and the validity of the proposed control schemes.

Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

A novel digital current control strategy for digitally controlled DC-DC switching converters, referred to as Adjacent Cycle Sampling (ACS), is proposed in this paper. For the ACS current control strategy, the available time interval from sampling the current to updating the duty ratio, is approximately one switching cycle. In addition, it is independent of the duty ratio. As a result, the contradiction between the processing speed of the hardware and the transient response speed can be effectively relaxed by using the ACS current control strategy. For digitally controlled buck DC-DC switching converters with trailing-edge modulation, digital current control algorithms with the ACS control strategy are derived for three different control objectives. These objectives are the valley, average, and peak inductor currents. In addition, the sub-harmonic oscillations of the above current control algorithms are analyzed and eliminated by using the digital slope compensation (DSC) method. Experimental results based on a FPGA are given, which verify the theoretical analysis results very well. It can be concluded that the ACS control has a faster transient response speed than the time delay control, and that its requirements for hardware processing speed can be reduced when compared with the deadbeat control. Therefore, it promises to be one of the key technologies for high-frequency DC-DC switching converters.

Exact steady‐state analysis in multiple‐input converters applied with diverse time‐sharing switching schemes

Time-sharing switching (TSS) techniques are usually utilised in multiple-input converters (MICs) to manage power sharing among inputs as well as output-voltage regulation. The two most-commonly-used TSS schemes in practical MIC applications are trailing-edge modulation (TEM) and interleaved dual-edge modulation (IDEM), both of which containing abundant significant information on conduction sequence. Steady-state analysis and computation help understand MICs' behaviour, being of high significance in both principal and practical researches. This study exhibits a general and exact methodology for computing and synthesising analytical expressions in a steady state of any kind of MIC topology, based upon analysis of segmented waveforms of common inductor current and output capacitor voltage. The derivation results are of high accuracy and generality, applicable for scenarios with arbitrary number of inputs in either continuous conduction mode or discontinuous conduction mode, and applied by either TEM-based or IDEM-based TSS schemes. Analytical and derivation details are addressed to the issues of multiple-input buck converters, along with general procedures established for other MICs topologies, for example, multiple-input buck–boost converters and multiple-input single-ended primary-inductor converters. Case study on a dual-input buck converter prototype, considering power dissipations and voltage drops on its components, is put forward for theoretical verification.

Predictive Trailing-Edge Modulation Average Current Control in DC-DC Converters

Predictive Trailing-Edge Modulation Average Current Control in DC-DC Converters

A Family of Predictive Digital-Controlled PFC Under Boundary Current Mode Control

One of the advantages of power factor corrector with boundary current mode control is the reduction of reversal recovery loss of diode. This paper proposes a family of predictive methods adapted to digital pulse-width modulations for digital-controlled PFC operated under boundary current mode. The DPWM methods include leading-edge modulation, trailing-edge modulation and triangular modulation. For the proposed control method, the switching period retaining zero current switching is predicted and the turn-on period is determined by the voltage controller. Therefore, neither zero-current detection nor high-frequency A/D converter for current sampling is required for the proposed control method.proposed control method. Experimental results derived from a DSP-based controller are presented for confirmation. The power factor corrector is with 250 W power rating, 100 V/AC/50 Hz input, and 385 V/DC output. Experimental results demonstrate the effectiveness of the proposed predictive digital-controlled PFC under boundary current mode control.

Design of Robust Digital Stabilizing Controller for Fourth-Order Boost DC–DC Converter: A Quantitative Feedback Theory Approach

In this paper, we have proposed a quantitative feedback theory based robust digital voltage mode controller for a fourth-order boost dc-dc converter operating in continuous conduction mode. Discrete-time models of the converter are established for triangular trailing-edge modulation, which is then used in the compensator design. It is observed that an up-down glitch is present in the frequency response of control-to-output transfer functions of higher order dc-dc converters, and because of this, gain margin (GM) and phase margin (PM) alone are unable to give correct information about closed-loop stability. Therefore, in this paper, we have introduced a safety margin as an additional design specification, which along with GM and PM information reflects the actual stability of the higher order dc-dc converters. A simplification in loop-shaping approach is also proposed, which considerably reduces the time and effort involved in loop-shaping as compared to present trial-and-error-based approach and also results in a robust compensator of feasible order. Robustness of the designed controllers is analyzed in frequency and time domains through computer simulations and is then verified experimentally on a 28-V 30-W laboratory prototype converter. The experimental results are in line with the analytical design studies and demonstrate that the controller, which is directly designed through a discrete-time model, is more robust than an average model-based digitally redesigned controller.

Modified Digital Pulse Width Modulator for Power Converters with a Reduced Modulation Delay

This paper presents a digital pulse width modulator (DPWM) with a reduced digital modulation delay (a transport delay of the modulator) during the transient response of power converters. During the transient response operation of a power converter, as a result of dynamic variations such as load step-up or step-down, the closed loop controller will continuously adjust the duty cycle in order to regulate the output voltage. The larger the modulation delays, the larger the undesired output voltage deviation from the reference point. The three conventional DPWM techniques exhibit significant leading-edge and/or trailing-edge modulation delays. The DPWM technique proposed in this paper, which results in modulation delay reductions, is discussed, experimentally tested and compared with conventional modulation techniques.

Average Current Control of a Series-Type Single-Phase PFC With Hybrid Modulation

This letter proposes a hybrid modulation scheme for the average current control (ACC) of the series-type single-phase power factor correction (PFC). The series PFC is a newly developed harmonic correction method for single-phase diode rectifier. It is composed of a hybrid full-bridge inverter and is in cascade between the dc terminal of the diode rectifier and the dc load. When the conventional ACC is applied, due to the large duty-ratio variation at the low-frequency transition points, the line current waveforms exhibit large distortion at the low-frequency switching points. A hybrid scheme, which combines the leading-edge and the trailing-edge modulation, is developed to overcome this problem. The reference signal selection and control logic design are discussed and implemented. Experimental results show that the proposed hybrid approach is able to reduce the harmonic distortion in the line current significantly, as compared with the conventional ACC control.

Digital Predictive Valley Current Control of Fourth Order Boost Converter under Trailing Edge Modulation

In this paper, a digital predictive valley current control is proposed for the 4th order boost converter. Detailed mathematical models of the converter system are formulated and then predictive average, peak and valley current control laws, in terms of valley current, are derived. Stability analysis of average, peak and valley current control, under trailing-edge modulation is carried out in the discrete domain. These investigations show that the average and peak current control schemes, with trailing edge-modulation, are unstable for certain duty ratio's, while the valley current control scheme is stable for all duty ratio's, 0 < D < 1. These theoretical studies are validated through the time-domain simulation studies. Discrete compensator is designed using digital direct design approach in order to realize the load voltage regulation together with the valley current control. Closed-loop performance of the proposed control scheme is simulated for different operating conditions. Experimental results are provided to validate the simulation results and theoritical stability predictions.

An improved sampled-data current-mode-control model which explains the effects of control delay

A new sampled-data model for the current-mode controlled buck converter includes for the first time the effects of delay in the pulse-width-modulator (PWM). Modified z-transforms are used in this new model for constant frequency trailing-edge modulation. Realistic amounts of delay are found to be particularly significant when the buck converter is operating in the continuous conduction mode near the discontinuous conduction mode boundary. The new model is used to predict the loop gain measurements obtained with the and with conventional measurement techniques. It is shown that conventional loop gain measurement techniques are insufficient to measure the loop gain in this region of operation. It is also shown that the digital modulator can add a significant amount of delay, thereby altering the loop gain of the circuit being measured. Unlike the case of a continuous system, PWM delay is found to significantly alter the low-frequency loop gain magnitude of this sampled-data system. The new model predicts the boundary condition for sub-harmonic instability, and reduces to Ridley's current-mode control model for the case of zero delay. Experimental corroboration is presented.

Transfer function of current modulator in PWM converters with current-mode control

Several different expressions have been derived in previous publications for the transfer function of the current modulator used in pulsewidth modulated (PWM) dc-dc power converters with current-mode control. These expressions give results higher than the measured ones and exhibit many other problems, e.g., one expression gives an infinite value when no slope compensation is used. This paper presents a derivation for the transfer function of the current modulator used in PWM converters with fixed-frequency, trailing-edge modulation, peak-current-mode control for two cases: without and with slope compensation. In addition, feedforward terms are also derived.

The overall small-signal model of the synchronous switch postregulator

The overall small-signal models of the synchronous switch postregulators (SSPRs) with leading-edge or trailing-edge modulation are developed. From the models, the effect of the main output to the auxiliary output when the SSPR is operated in the continuous conduction mode or in the discontinuous conduction mode can be predicted. Once the main output enters into the discontinuous mode, the performances of the auxiliary output will degrade very much, even with the help of the postregulation, but if only the auxiliary output enters into the discontinuous mode, the performance degradation of the auxiliary output can be less severe.

A general constant-frequency pulsewidth modulator and its applications

Constant-frequency pulsewidth modulation (PWM) is the most frequently used method in the control of switching converters. This paper proposes a general PWM modulator that realizes various control schemes with either trailing-edge or leading-edge modulation. Based on that a general double-edge modulator ran be constructed. The proposed modulator is applied to feedforward control of a family of converters, current-mode control with linear or nonlinear compensating slope, and a family of unity-power-factor rectifiers at continuous or discontinuous conduction mode to demonstrate its generality. Experimental and PSPICE verifications are provided.