Top Capping Layer Research Articles

Effect of cap layer and post growth on-site hydride passivation on the surface and interface quality of InAsP/InP hetero and QW structures

The performance of devices made from III-V compound semiconductors relies heavily on their surface and interface properties. The InAsP/InP material system is recently gaining interest due to its suitability for the next generation of long-haul classical and quantum communication applications. Researchers are studying how surface and interface properties affect the efficiency of the device and concludes that the epitaxial growth conditions responsible for creating surface and interface states require further improvement. To address this, we have studied the effect of the top (cap) layer and post-growth on-site hydride passivation on the properties of InAsP/InP hetero-structures grown using metal-organic vapor phase epitaxy technique. The flow rate and flux ratios of the hydrides significantly affect the surface reaction rates and gas-phase diffusion coefficients, which in turn impact the As↔P exchange mechanisms. Our findings suggest that post-growth on-site arsine passivation encourages the As↔P substitutions at the vicinity of the desorption sites of phosphorus, leading to the arsenic-rich surface of InAsP with the diffused hetero-interfaces. The activation energy for such As↔P exchange reaction mechanism is evaluated as ∼ (1.4 ± 0.3) eV. On the other hand, it has been observed that the thin cap layer of InP protects the surface of the InAsP epilayer and thereby preserving the sharp interface. Further, surface photovoltage and photoluminescence spectroscopy is employed to examine the role of the diffused and sharp interface of InAsP/InP hetero-structures in charge carrier transport, their redistribution and recombination process. Our analysis of the energy transitions occurring in the surface photovoltage and photoluminescence spectrum reveal that the energy band alignment and the subsequent charge carrier redistribution processes is influenced by the surface and interface states. These changes in the surface photovoltage phase spectra of InAsP/InP system also support the role of surface and interface states in the generation and separation of the charge carriers. The study provides insights into the effects of As↔P exchange on surface and interfacial quality, highlighting the implications for optoelectronic device development using InAsP/InP material system.

Design and characterization of type-II superlattice-based InAs/AlSb/GaSb detector structure

In this study, N-Structured based InAs/AlSb/GaSb Type-II Superlattice pbin type detector structures are investigated. These systems make absorption in the infrared region in the electromagnetic spectrum as detectors. Structural characterization of these systems is aimed. n-type GaSb is used as the substrate. InAs/AlSb/GaSb-based repetitive SL layers are formed as n-layer, i-layer, p-layer, and p-contact layer from the bottom InAsSb layer to the top GaSb cap layer for 120, 300, 15, and 80 periods, respectively. Structural characterization of all layers is made by using SIMS and XRD systems analyses. The structural depth profile of the SL layers has been presented comparatively through SIMS analysis. The interfacial transitions observed in the depth profile are consistent with the designed T2SL layers. By using XRD characterization, crystal quality parameters, lattice constants, periodicity, and deviation of superlattice peak from the substrate are determined. Such dislocation density and strain are measured AS 7.85x107cm−2 and 6.4x10-3 nm, respectively. AFM analysis technic is used to examine the surface morphology of the structure. Also, SEM analysis is used to examine the cross-section of the structure. The cross-sectional measurements allowed the observation of interfacial transitions within the SL structure. In this study, super lattice with high crystal quality is achieved and results show that T2SL detector structures have succeeded.

Polarization tunable transmitted full-color display enabling switchable bright and dark states.

Although structural colors based on nanostructures have attracted many researchers' attentions due to their superior durability and high resolution, most previous reports focused on the static and dynamic structural colors in reflection mode and few researchers focus on the static and dynamic transmission colors for high-saturation RGB models. Here, the hybrid Al-Si3N4 nanogratings with the top SiO2 capping layer and the bottom MgF2 layer that can switch full-hue and high-saturation transmitted structural colors on and off completely by changing the polarization state are theoretically demonstrated. Meanwhile, the hybrid Al-Si3N4 nanogratings with the top capping layer and the bottom layer also achieve the transmittance spectra with the full width at half maximum of ∼58 nm and the transmittance efficiency of over 70% in the on state. The added top capping layer and bottom layer can suppress the sideband of transmittance spectra in the on state and maintain the near-zero transmittance in the off state, thus improving the switching performance between bright and dark states. The realizable high-saturation colors in the on state can take up 125% sRGB space and 80% Adobe sRGB space. More interestingly, with the incident angle varying from 0° to 50°, full-hue color can be also realized in the on state and nearly black color can be also maintained in the off state. The strategy will provide potential applications in advanced color encryption and multichannel imaging.

Dry pick-and-flip assembly of van der Waals heterostructures for microfocus angle-resolved photoemission spectroscopy

We present a dry pick-and-flip assembly technique for angle-resolved photoemission spectroscopy (ARPES) of van der Waals heterostructures. By combining Elvacite2552C acrylic resin and 1-ethyl-3-methylimidazolium ionic liquid, we prepared polymers with glass transition temperatures (Tg) ranging from 37 to 100 ℃. The adhesion of the polymer to the 2D crystals was enhanced at {T}_{text{g}}. By utilizing the difference in {T}_{text{g}}, a 2D heterostructure can be transferred from a high-{T}_{text{g}} polymer to a lower-{T}_{text{g}} polymer, which enables flipping its surface upside down. This process is suitable for assembling heterostructures for ARPES, where the top capping layer should be monolayer graphene. The laser-based micro-focused ARPES measurements of 5-layer WTe2, 3-layer MoTe2, 2-layer WTe2/few-layer Cr2Ge2Te6, and twisted double bilayer WTe2 demonstrate that this process can be utilized as a versatile sample fabrication method for investigating the energy spectra of 2D heterostructures.

Characterization of AlXGa1−XN/GaN High Electron Mobility Transistor Structures with Mercury Probe Capacitance–Voltage and Current–Voltage

Characterization of high electron mobility transistor (HEMT) structures is important for predicting device behavior, monitoring and developing processes, and improving performance. Multifrequency capacitance–voltage (CV) and direct current–voltage (IV) methods are applied with a mercury probe to assess the HEMT with and without capping layers to monitor critical parameters such as pinch‐off voltage, two‐dimensional electron gas (2DEG) sheet charge, GaN carrier density profile, AlGaN thickness, and dielectric constant and properties of the top capping layer.

Quantitative investigation of indium distribution in InN wetting layers and dots grown by metalorganic chemical vapor deposition

InN dots grown by metalorganic chemical vapor deposition were analyzed using atom probe tomography and transmission electron microscopy. A dot was found to be composed of pure InN at the core with a sharp interface with its underlying GaN layer and a more diffuse interface with its top GaN cap layer. Both techniques revealed the hexagonal truncated pyramid shape of the dots. APT has been used in the analysis of the wetting layers formed between the quantum dots. The fractional coverage appeared to saturate at longer growth times, with the highest fraction of monolayer coverage found to be 0.6.

Theoretical Modeling of the Internal Power Flow and Absorption Loss of the Air Mode Based on the Proposed Poynting Vector Analysis in Top-emitting Organic Light-emitting Diodes

We propose the Poynting vector analysis of the air mode in a top-emitting organic light-emitting diode (OLED) by combining the transfer matrix method and dipole source term. The spatial profiles of the time-averaged optical power flow of the air mode are calculated inside and outside the multilayer structure of the OLED with respect to the thickness of the semi-transparent top cathode and capping layer (CPL). We elucidate how the micro-cavity effect controlled by the thickness variation of the semi-transparent top cathode or CPL affects the internal optical power and absorption loss inside the OLED multilayer and the external optical power coupled into the air. When the calculated absorption loss and external power obtained by the proposed Poynting vector and currently-used point dipole models are compared, two calculation results are identical, which demonstrates the validity of the two models.

Investigation of Disilane-Based SiGe-HBT Layers for Low External Base Resistances

In the past decade there has been increased interest in utilizing SiGe-heterojunction bipolar transistors (SiGe-HBT) and in particular SiGe-BiCMOS technologies for applications in the mm-and sub-mm-wave range. High data rate communication systems and optical networks for >100Gb/s, industrial and automotive sensors at 120 GHz for velocity and position control as well as imaging systems at >160 GHz for medical and security systems are some examples for these fields of application. Key elements for the continuous improvement of the high frequency performance of SiGe-HBTs are the scaling of vertical and lateral dimensions as well as design optimization to achieve reduced parasitics. In particular the maximum oscillation frequency fmax could be increased in the last years above 0.5 THz. Beside a sufficient high cut-off frequency fT, a reduced base-collector capacitance CBC and low base resistance RB are beneficial for the fmax performance of a SiGe-HBT. In this work we investigate the behavior of the external base resistance RBext for two different epitaxial processes used in SiGe-HBTs with a silane- (SiH4) and disilane-based (Si2H6) precursor. The SiGe-layers were treated by various rapid thermal annealing (RTA). We processed different wafers with an oxide stack usually used in a standard SiGe-BiCMOS process. After the release of certain silicon regions by reactive-ion-etching the epitaxial layers were deposited. First a selective epitaxial silicon buffer was grown within oxide-free windows followed by non-selective growth of a silicon layer, the in-situ boron doped SiGe base layer and an on top silicon cap layer. For the disilane-based process the SiGe layer grows in an amorphous phase whereas for the silane-based process a poly-crystalline film is formed. The growth of the whole Si-SiGe-Si stack was adapted for disilane process in order to reach the same layer thicknesses for both variants inside oxide free windows (single-crystalline regions) as for the original silane-based process. Sheet resistance (Rs) measurements were performed on 49 points across a wafer on the poly crystalline SiGe layer on an oxide. Figure 1 shows the Rs of silane-based (#1) and disilane-based (#3) SiGe-layer after a rapid thermal annealing at 1010°C for 12s. We observe a decrease of Rs by 60% in comparison to the silane-based SiGe-layer. Even for a reduced annealing temperature of 950°C (#2) the Rs dropped down around 30% in comparison to the silan-based variant. Moreover the standard deviation of the sheet resistance in the poly-crystalline regions across the wafer becomes significantly smaller and decreased by a factor of six down to approximately 50 Ohm/square for the disilane-based SiGe stack. Secondary-ion-mass-spectroscopy (SIMS) measurements were used to characterize the boron doping and SiGe-profile inside the crystalline and poly-crystalline regions of the wafers. In the poly crystalline region the germanium and boron concentration of the disilane-based process corresponds to the distribution of the single crystalline region. However we obtain a difference in the doping distribution after epitaxy (Fig. 2a) in comparison to the silane-based process. This difference becomes more significant after the RTA and we observe a quite homogeneous distribution of Ge and boron for the silane-based SiGe-stack whereas a steeper doping is within poly-crystalline layers for the disilane-based process (Figure 2b). We address this disparity in the Ge and boron distribution to differences in the diffusion behavior for the disilane-based layer stack due to i) the deposition as an amorphous Si/SiGe/Si layer and ii) the grain size of the poly-crystals after the final RTA. For our operation point the loading effect during the disilane-based epi-process leads to a 40% increased boron dose in the external base region compared to the silane-based process and without increasing the B doping inside the single crystalline region. This is beneficial for the behavior of RBext. Finally we applied both variants in a standard SiGe-BiCMOS flow. The overall performance of the SiGe-HBT depends of course on several other aspects like base-emitter and base-collector capacitances and the influence of changing one parasitic component has to be carefully evaluated. Nevertheless the external base resistance as well as the contact resistance dropped by 55% and 45%, respectively, for the disilane-based process and show the benefits for the use of this type of epitaxial layer depositions in advanced SiGe-HBTs. Figure 1

Few-layer SnSe2 transistors with high on/off ratios

We report few-layer SnSe2 field effect transistors (FETs) with high current on/off ratios. By trying different gate configurations, 300 nm SiO2 and 70 nm HfO2 as back gate only and 70 nm HfO2 as back gate combined with a top capping layer of polymer electrolyte, few-layer SnSe2 FET with a current on/off ratio of 104 can be obtained. This provides a reliable solution for electrically modulating quasi-two-dimensional materials with high electron density (over 1013 cm−2) for field-effect transistor applications.

Modulation of interlayer exchange coupling strength in magnetic tunnel junctions via strain effect

Interlayer exchange coupling of two ferromagnetic electrodes separated by a thin MgO tunnel barrier is investigated using magneto-optical Kerr effect. We find that the coupling field can be reduced by more than 40% as the thickness of a top Ta capping layer increases from 0.5 to 1.2 nm. In contrast, a similar film stack with an additional 3 nm Ru capping layer displays no such dependence on Ta thickness. Transmission electron microscopy study shows that the oxidation of the exposed Ta capping layer induces changes in the crystalline structures of the underlying films, giving rise to the observed reduction of the interlayer coupling field.

A 1D Electrospun Nanofiber Channel for Organic Field‐Effect Transistors Using a Donor/Acceptor Planar Heterojunction Architecture

An organic donor/acceptor planar heterojunction transistor based on electronspun poly(3-hexlthiophene)/thermally deposited copper hexadecafluorophthalocyanine (F16CuPc) active layer has been developed for a unipolar p-type nonvolatile memory and ambipolar device through simple tuning of the top F16CuPc capping layer thickness.

(Invited) P-Type III-Sb MOSFET on a Metamorphic Substrate: Towards All III-V CMOS

Group III-Sb materials have the best hole transport among all the III-V semiconductors and therefore are promising candidates for future p-type MOSFETs for all-III-V CMOS ICs. Progress is reported on development of strained InGaSb p-type channels grown by molecular beam epitaxy with metamorphic buffers on lattice-mismatched GaAs and Si substrates with the emphasis on specific defects, surfaces and interfaces and electrical characteristics of these materials, structures and devices. Optimization of MBE growth on GaAs (001) substrates has resulted in “step-flow” growth mode of GaSb with monolayer-high steps on the surface, about 107cm-2 dislocation density and bulk hole mobility of 860 cm2/Vs. Strain optimization in InGaSb quantum wells (QW) has provided the highest Hall mobility of 1020 cm2/Vs at sheet hole density of 1.3x1012/cm2 obtained for In0.36Ga0.64Sb with compressive strain of 1.8%. Hole mobility in buried QW channel with Al2O3 high-k gate oxide has shown just a minor 30% drop of the mobility due to interface-related scattering to ~700 cm2/V-s in the surface QW channels. An InAs top capping layer reduces the interface scattering even further; the sample with 3nm total top barrier thickness demonstrates mobility of 980 cm2/V-s and shows sheet resistance of 4.3 kΩ/sq., very close to the minimum QW resistance in the bulk. Larger lattice mismatch and non-polar nature of silicon present a further challenge for growth of high quality III-Sb materials. Formation of defects is analyzed and baseline for surface morphology and defect densities (threading dislocations, microtwins and antiphase boundaries) are presented. Defects formed on Si substrates produce significantly higher background p-type doping and stronger scattering than that on GaAs substrates. A similarly strained InGaSb QW with InAs capping layer and 3nm total top barrier thickness has shown the highest mobility of 630 cm2/V-s on a Si substrate. Both n- and p-type MOS capacitors were studied with various thicknesses of III-Sb buffers and consequently, with different defect densities. Be-doped p-type GaSb MOS capacitors demonstrated similar characteristics to MOSCaps grown on GaAs substrates. In contrast, we observed a p-type MOSCap behavior in GaSb:Te on Si devices despite Te doping of up to 5x1017 cm-3 in the structures with thin, <1.5mm III-Sb structures. Thicker structures with dislocation densities in the top layers <108 cm-2 have shown normal n-type C-V behavior similar to the structures grown on GaSb and GaAs substrates, but with significantly shorter minority carriers generation/recombination lifetimes. SIMS analysis did not reveal noticeable Si diffusion from the substrate, nor other impurities were detected in GaSb. Specific morphological features on the surface, were further analyzed using TEM, FIB/SEM and AFM. Two major types of surface topography defects were found: shorter crystallographically aligned straight steps resulting from microtwins and creating the surface steps with the height equal to the number of faulted planes; and longer winding loops corresponding to antiphase domain boundaries confirmed by direct STEM imaging of the high/low-z Sb/Ga dumbbell contrast. Cross-sectional TEM reveals the density ~6x108 cm-2 of threading dislocations within top layer of epi structure with total thickness of 1.25 um, and ~2x104 cm-1of planar defects. Based on the finding of low thermal budget (<4500C) of the III-Sb/oxide interfaces, two novel technology paths have been developed for MOSFFETs on GaAs substrates: gate-first self-aligned with in-situ MBE gate oxide; and gate-last with InAs etch-stop layer, epi-contacts and ALD oxide combined with optimized dry and wet etching techniques to improve the interface and reduce the access resistance. The resultant MOSFETs have shown close to record-high drain currents.

Effects of matrix layer composition on the structural and optical properties of self-organized InGaN quantum dots

Self-organized InGaN quantum dots (QDs) with emission wavelength from green to red range have been grown on GaN templated c-plane sapphire substrates by metal-organic chemical vapor deposition (MOCVD). The effects of matrix layer composition on the structural and optical properties of InGaN QDs have been investigated. A continued growth of QDs is observed during the growth of In0.1Ga0.9N matrix layer, which results in an increase of the QDs' size. By using In0.1Ga0.9N matrix layer instead of GaN one, the annealing induced blue-shift in emission energy of the InGaN QDs can be suppressed. After the growth of top GaN cap layer, a larger red-shift caused by the quantum confined Stark effect is observed in the sample with In0.1Ga0.9N matrix layer. Employing this method, InGaN QD sample emitting at 615 nm with an internal quantum efficiency of 24.3% has been grown. The significance of this method is that it allows a higher growth temperature of InGaN QDs with emission wavelength in the green range to improve the crystalline quality, which is beneficial to enhance the efficiency of green InGaN QD light-emitting-diodes and laser diodes.

Hole mobility and remote scattering in strained InGaSb quantum well MOSFET channels with Al2O3 oxide

AbstractHall mobility and major scattering mechanisms in surface and buried MBE grown strained InGaSb quantum well (QW) MOSFET channels with in‐situ grown Al2O3 gate oxide are analyzed as a function of sheet hole density, top‐barrier thickness and temperature. Mobility dependence on Al0.8Ga0.2Sb top‐barrier thickness shows that the relative contribution of interface‐related scattering is as low as ∼30% in the surface QW channel. An InAs top capping layer reduces the interface scattering even further; the sample with 3 nm total top‐barrier thickness demonstrates mobility of 980 cm2/Vs giving sheet resistance of 4.3 kΩ/sq, very close to the minimum QW resistance in the bulk. The mobility–temperature dependences indicate that the interface‐related scattering is dominated by remote Coulomb scattering at hole densities &lt;1 × 1012 cm–2. (© 2013 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Effect of La2O3 Capping Layer Thickness on Hot-Carrier Degradation of n-Channel Metal–Oxide–Semiconductor Field-Effect Transistors with High-k/Metal Gate Stacks

The effect of La2O3 capping layer thickness on the hot-carrier degradation of n-channel metal–oxide–semiconductor field-effect transistors (n-MOSFETs) with high-k/metal gate stacks is investigated. The hot-carrier degradation is monitored by measuring the threshold voltage Vth, transconductance gm, and subthreshold slope SS. As the thickness of the La2O3 layer increases, Vth degradation is enhanced regardless of whether the La2O3 layer is deposited above or below the HfSiO layer. The generation of interface traps induced by hot-carrier stress is intensified with an increase in the bottom capping layer thickness. On the other hand, the generation of oxide traps induced by hot-carrier stress is intensified with an increase in the top capping layer thickness.

Semitransparent inverted polymer solar cells using MoO 3/Ag/V 2O 5 as transparent anodes

We demonstrate semitransparent inverted polymer solar cells with highly transparent anodes. The structure of the anode is molybdenum trioxide (MoO 3)/silver (Ag)/vanadium pentoxide (V 2O 5). The inner MoO 3 layer is introduced as a buffer layer to improve holes collection, while the outer V 2O 5 layer served as a light coupling layer to enhance optical transmittance of the photovoltaic device. The maximum transmittance of 90% from 400 nm to 700 nm is obtained when the thickness of V 2O 5 is 40 nm. When the thickness of V 2O 5 is 40 nm, under AM1.5G illumination of 100 mW/cm 2 illuminated from ITO side (bottom), the J sc is 5.01 mA/cm 2, the V oc is 0.591 V, the FF is 61.8%, and the PCE is 1.83%; from MoO 3/Ag/V 2O 5 side (top), the J sc is 4.28 mA/cm 2, the V oc is 0.585 V, the FF is 61.9%, and the PCE is 1.55%. The trend of the optical electric field distribution is highly consistent with the J sc , which is dependent on the thickness of the V 2O 5 top capping layer.

Subthreshold Characteristics of MOS Transistors With $ \hbox{CeO}_{2}/\hbox{La}_{2}\hbox{O}_{3}$ Stacked Gate Dielectric

This letter reports the subthreshold characteristics of MOS transistors with the novel CeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /La <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> stacked gate dielectric. We found that the top CeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> capping layer does not only improve the bulk properties of La <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> by reducing the oxygen vacancies as a result of the reduction reaction of CeO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> but also reduces the La <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /Si interface trap pronouncedly. We further identify the energy level of the interface traps by conducting temperature-dependent subthreshold slope measurements.

Highly efficient top-emitting white organic light-emitting diodes with improved contrast and reduced angular dependence for active matrix displays

Highly efficient top-emitting white organic light-emitting diodes (TEWOLEDs) on silicon substrates based on complementary blue and yellow phosphors are demonstrated. The bottom copper anode with medium reflectance, which is compatible with standard complementary metal oxide semiconductor (CMOS) technology, and the semitransparent cathode with a top capping layer, are introduced to facilitate white light emission with improved contrast and reduced angular dependence. Both TEWOLEDs, with and without the capping layers, exhibit nearly lambertian-type emission. The spectrum of TEWOLED with a capping layer is similar to that of the bottom-emitting counterpart. Our TEWOLED reaches high efficiencies of 27.7 cd/A and 17.6 lm/W at a current density of 10 mA/cm 2, and low voltage of 4.4 V at 1000 cd/m 2.

The VFB Modulation Effect of ALD Grown Al2O3, SrO, La2O3 Capping Layers with HfO2 Gate Dielectrics

The effect of atomic layer deposited Al2O3, SrO, and La2O3 capping layers with HfO2 gate dielectrics were examined ffor flat band voltage (VFB) modulation. Al2O3 capping layers cause a VFB shift into the positive voltage direction, while SrO and La2O3 capping layers cause a shift into the negative voltage direction. The bottom capping layer, which positions between the Si substrate and the HfO2 dielectric was more effective in modulating the VFB compared to the top capping layer. The insulating properties of the gate dielectric stacks with different capping layers were also examined. X-ray photoelectron spectroscopy analysis verified that top capping layers did not generally diffuse to the interface between the Si substrate and the HfO2 dielectrics, which supports the result that bottom capping layers are more effective in modulating the VFB.

Incoherent Switching Amount Analysis of Exchange Spring Media by Using Initial Minor Loop Slope Measurement

We describe a newly developed initial minor loop slope (IMLS) experimental method capable of measuring reversal switching in exchange spring perpendicular media. The slope peak height is centered near the medium's coercivity Hc. The magnitude of the peak signal is correlated with the soft top (cap) layer's moment, Mst, and the exchange coupling strength between the cap and hard magnetic oxide layers. The peak position was correlated to the media Hc for media that is thermally stable and migrates to smaller fields in less stable media. The IMLS results are compared with both remanent angular dependence coercivity, Hcr, measurements and micro-magnetic simulations. This technique provides a simple method of characterizing incoherent switching behavior in different types of exchange spring media.