Neuromorphic computing inspired by neural network systems of the human brain enables energy efficient computing as a solution of the von Neumann bottleneck. A neural network consists of thousands or even millions of neurons which communicate with each other through connected synapses. Synapses can memorize and process the information simultaneously. The plasticity of a synapse to strengthen or weaken its activity over time make it be capable of learning and computing. Thus, artificial synapses which can emulate functionalities and the plasticity of bio-synapses form the backbone of a neuromorphic computing system.Non-volatile memories with two-terminals, like resistive random-access memory (ReRAM), phase change memory (PCM), are attractive candidates for artificial synapses. However, signal processing and learning cannot be performed simultaneously in these two-terminal synapses. FeFET, similar to a MOSFET structure using CMOS compatible HfO2 based ferroelectrics as gate oxide forms three-terminal synapses offering high endurance, good performance and high energy efficiency. In contrast to two-terminal devices, three terminal FeFET based synapses can perform processing and learning at the same time. In order to maintain the ferroelectric properties of an HfO2 based ferroelectric film, high temperature annealing should be avoided after the ferroelectric layer deposition. In this paper, we present ferroelectric NiSi2 source/drain Schottky barrier (SB) MOSFET (FE-SBFET) structure (Fig.1a), which requires neither ion implantation nor thermal activation of source/drain contacts at high temperatures.FE-SBFETs were fabricated on SOI substrates with a boron-doped (1016 B/cm-3), 55 nm thick top Si layer and a 145 nm thick buried oxide (BOX) layer. Very thin (9 nm) single crystalline NiSi2 layers which offer superior properties of uniform and stable SB contacts on Si are used at source/drain regions. A gate stack consisting of 10 nm thick Hf0.5Zr0.5O2 (HZO) layer and a 40 nm thick TiN layer are deposited by ALD and sputtering, respectively. A rapid thermal annealing at 500 °C is performed to crystallize the HZO into a ferroelectric phase before the gate patterning. The fabricated device has a channel length of 10 µm and a gate width of 10 µm. The overlap between the top gate and NiSi2 is 6 µm along the channel and 10 µm wide on each side. The ferroelectric polarization modulates both the SB at the source/drain contacts as well as the potential in the channel, thus changing the carrier injection through the SB. The Id-Vg transfer characteristics of a p-type FE-SBFET shows a clockwise hysteresis which is caused by the ferroelectric polarization switch.The excitatory post-synaptic current (EPSC), one of the typical short-term synaptic plasticity features for biologic synapses, is characterized by measuring the transient drain currents for a voltage pulse on the gate of a FE-SBFET (Fig.1b). The amplitude of the pulse VAM changes from -0.2 to -1.2 V with a fixed pulse width tpw=1 μs. We found that the EPSC peak value increases linearly with VAM. It shows a very low energy/spike consumption of 2fJ/spike at VAM=-0.2 V, demonstrating a very high energy efficiency. From the EPSC measurements with repeated gate voltage pulses paired-pulse facilitation/depression (PPF/PPD) are characterized showing an exponential decay, similar to biological synapses.The long-term synaptic plasticity of FE-SBFET synapses is characterized by a series repeated identical or non-identical pulses. The later can improve the long-term potentiation/depression (LTP/LTD) symmetry and linearity. The measurements show a large Gmax/Gmin ratio, very high endurance and small cycle-to-cycle (CTC) variation (1.06%) due to the perfect contact of NiSi2 (Fig.1c). The biological neuron-like spike-timing-dependent plasticity (STDP) is characterized for the FE-SBFET synapse. The results show an asymmetric anti-Hebbian STDP, which is one of the biological STDP functionalities (Fig.1d).In conclusion, the fabricated FE-SBFET synapse exhibits multiple synaptic functions with high endurance and small variations. The ultra-low energy/spike consumption indicates a high potential for low power neuromorphic computing applications. Acknowledgement: This work was supported by the Federal Ministry of Education and Research (BMBF, Germany) in the project NEUROTEC (16ME0398K). Figure 1
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Jul 29, 2024
Christian Mai + 6
Open Access
