A new method is presented for efficient statistical analysis of linear electronic circuits, when small and large parameter tolerances are given. The statistically generated value of the parameter is considered as a faulted value, as it deviates from the nominal thus enabling the application of a simulation method which uses a new approach of concurrent fault simulation. This method adds new elements to the circuit, representing individual parameter increments, while keeping the topology of the original one. The equations for the original and several perturbed circuits are formulated and solved simultaneously. In this way, redundant computations are avoided in both the equation formulation and equation solving phases, which shorten the simulation time. A statistical frequency and time domain tolerance simulator of linear circuits was developed on the basis of this method with effective user-friendly interface. The method is especially suited for yield sensitivity to some selected circuit parameters estimation. Here simulation results of several benchmark circuits are presented. Efficiency analysis is also included.
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