Three-phase VSI Research Articles

Sigma-Delta Modulation on a Three-Phase Four-Leg VSI to Eliminate the Common Mode Voltage and Comply With the Military Standards

This paper demonstrates sigma-delta pulse density modulation (PDM) without common mode voltage on a four-leg voltage source inverter designed as a grid-forming inverter. Using PDM ensures that switching updates occur simultaneously for all phases and sigma-delta modulation is the most advantageous PDM for this application. The converter does not produce common mode voltage in the switching frequency range, thus meeting the conducted electromagnetic interference limits in MIL-STD-461G without the need for a large common mode choke. Further, the proposed common mode elimination method does not degrade the output voltage power quality, which meets the requirements in MIL-STD-1399 section 300 part I for type 1 voltage. The practical implementation of the control system on a Field Programmable Gate Array (FPGA) is presented and compliance with the two military standards is demonstrated on a laboratory prototype built with SiC MOSFETs.

Method for estimation of power losses and thermal distribution in power converters

The power loss estimation is a crucial step for power electronics design, especially for high-power-density systems. Many mathematical approaches are known for power loss estimation, but the system design time can be lowered significantly if a simulation approach is used. This paper discusses the MATLAB-based simulation method for estimating power losses in the three-phase VSI. This simulation is using a real characteristic of the used IGBT transistors for power loss estimation. Next, the model uses the simulated power losses and calculates temperatures at different points in the simulated model. For the visualization, Fusion360 was used to simulate the thermal spreading at the heatsink. Finally, the inverter power losses are measured at the different loads to confirm the accuracy of the model. The temperature of the heatsink is measured with a thermal imaging camera and surface mounted probes.

Robust Control of Three-Phase VSI with LCL Filter for Distributed Generation Power Quality Improvement

This paper proposes a methodology to control a three-phase voltage source inverter with LCL filter for distributed generation (DG) in microgrid scenario. Thus, the presented control strategy allows the DG system to operate in both grid-connected and islanded modes with a smooth transition between them. Therefore, the DG control system strategy is performed by splitting the control input into two control-stages; the first one is in charge of reproducing sinusoidal voltages at the filter capacitors; meanwhile, the second is dedicated to modulate these voltages in order to achieve proper amplitude and phase for correct output current injection. By means of discrete-time state-space representation of the system, state-feedback controllers are obtained employing linear matrix inequalities considering uncertainties on grid inductances and optimization of the H2 norm for each operation mode. Finally, the feasibility of the proposed DG system is demonstrated and validated through computational simulations, as well as experimental evaluations.

Hysteresis Model Predictive Current Control for PMSM With LC Filter Considering Different Error Shapes

This paper investigates three-phase two-level VSI hysteresis-based Model Predictive Control (MPC) for permanent magnet synchronous machines with different current error shapes. To limit the motor current harmonics and prevent overheating of the magnets, motor filters (mostly LC filters) are often used. The hysteresis-based MPC is investigated to provide high dynamic performance and limit the size of the filter. To compensate the resonance introduced by the LC filter and to improve system efficiency, a virtual resistor active damping strategy is implemented. To avoid additional sensors, the filter states are determined by a Luenberger Observer. However, up to now these strategies have never been investigated together with MPC and different current error shapes for motor applications. Simulation results for the different strategies prove the performance efficiency and experimental tests verify the results in a laboratory environment.

Current Stress Reduction for DC-Link Capacitors of Three-Phase VSI With Carrier-Based Continuous PWM

This article proposes a novel continuous pulsewidth modulation (CPWM) method to reduce dc-link current harmonics in voltage source inverters over wide range of load power factor. This modulation method contributes to a current stress reduction of dc-link smoothing capacitor and a suppression of its temperature rise. Furthermore, high-cost digital hardware, such as a field-programmable gate array, is not necessary because this modulation is implemented with only one carrier. The dc-link current harmonics are reduced by shifting voltage references in every half control period to reduce a fluctuation of the dc-link current around its average value. Experimental results confirm that the application of the proposed CPWM reduces the dc-link current harmonics by 24.2% at most and lowers an equilibrium capacitor temperature by 6.0 °C compared to the conventional CPWM.

Comprehensive analysis of three- and five-phase PUC inverters with harmonic injection modulation techniques

Multiphase power electronic converters are gaining more popularity nowadays. Three-phase system is not enough to produce smooth torque in industrial application. So systems that have more than three phases are gaining popularity due to their smooth torque and more power than the three-phase systems for the same phase voltage and current. Selection of even number of phases is generally avoided because it degrades motor performance due to the coincidence of motor poles with each other. This paper deals with carrier-based pulse width modulation techniques with the third-harmonic and fifth-harmonic injections in three-phase and five-phase five-level packed U-cell (PUC) inverter. Harmonic injection gives improvement in DC bus utilization without going into the overmodulation region. The viability of this concept is verified by MATLAB/Simulink by taking the three-phase and five-phase VSI as an example. The relation between the three-phase and five-phase voltage and power is analyzed and verified mathematically. The PUC inverter comprises the least number of device count, so it can be a good option for multiphase application in industrial drives.

Improving Of Performance Characteristics Of Induction Motor Using Inverter Topologies

This paper presents the simulation and implementation of multilevel inverter fed induction motor drive. The output harmonic content is reduced by using multilevel inverter. In symmetrical circuit, the voltage and power increase with the increase in the number of levels of inverter. The switching angle for the pulse is selected in such way to reduce the harmonic distortion. This drive system has advantages like reduced total harmonic distortion and higher torque. The model of the multilevel inverter system is developed with PWM strategy to control the induction motor. The rate of change of voltage with respect to time i.e. dv/dt is very high at these edges, of the order of 500–5000 V/μs.The two-level inverter topology has attracted attention in low power low voltage drive applications where as Three-Level inverter topology has attracted attention in high power High performances voltage drive applications. Single-phase VSI cover low-range power applications and three-phase VSI cover the medium- to high-power applications. The Main purpose of these three level inverter topologies is to provide a three-phase voltage source, where the amplitude, phase, and frequency of the voltages should always be controllable. Although most of the applications require sinusoidal voltage waveforms.

Fault Diagnosis and Fault Tolerant Control of a Three-Phase VSI Supplying Sensorless Speed Controlled Induction Motor Drive

Fault diagnosis in variable speed drives under inverter faults has been widely addressed in the literature. However, research activities in this field have been always focused only on sensored motor drives. This paper deals with a mixed model-based and signal-based approach for both insulated-gate bipolar transistor (IGBT) open-circuit fault diagnosis and fault tolerant control in sensorless speed-controlled induction motor (IM) drive. Sliding mode observer (SMO) is used for speed and stator currents estimation and simultaneously open-switch fault diagnosis. Unlike the classical sensored drive systems, this structure presents particular dynamics under faulty operation-mode which can be taken into account for fault detection and identification (FDI) process designing. The proposed diagnostic algorithm is based on similarity test between measured and estimated currents to define the FDI index in the inverter. The proposed method allows detection and localization of single and multiple IGBT open-switch faults. To improve the reliability of the motor drive, the ability of the SMO to reconstitute the motor state estimation after the disturbance stage of the FTC application is verified. The proposed FDI and FTC schemes are implemented on a dSPACE DS1104 controller board for a 3-kW IM drive system. Several experiments are displayed to show the effectiveness and feasibility of the proposed method.

Current controller of three-phase VSI using FCS-MPC with optimal active and zero vector selection for balanced loss distribution and switching loss reduction

Summary High switching loss remains a predominant issue in conventional finite control set model predictive control (FCS-MPC) for voltage source inverter, aside from the uneven distributed loss between upper switches and lower switches. While maintaining the inherent simplicity and effective reference tracking capability of conventional FCS-MPC, a new FCS-MPC is proposed to acquire substantial improvement in switching loss reduction by choosing the optimal zero vector and two active vectors. Selection of the two active vectors is performed by considering two legs that have maximum and minimum output voltage at particular sampling instant, while the selection of the optimal zero vector is based on the switching states of the previous sampling instant. The proposed method also ensures uniformly distributed loss in each phase as well as between upper switches and lower switches. Further switching loss reduction by selecting the appropriate weighting factor in the cost function is investigated for both the conventional and proposed methods as well. A loss model is constructed in MATLAB/SIMULINK for analyzing quantitative switching loss, conduction loss, total harmonic distortion, and number of switching. The proposed method ensured its superior performance under different load angles and sampling periods, and all the results are verified through simulation.

Investigation of Line Current Harmonics in Cascaded Multi-level Inverter Based Induction Motor Drive and an Adaptive On-line Selective Current Harmonic Elimination Algorithm

Multilevel Inverters (MLIs) have drawn increasing attention in numerous applications, especially in drives, distributed energy resources area, utility etc. MLIs have the ability to synthesize a near sinusoidal output voltage wave with minimal Total Harmonic Distortion (THD) in low frequency switching. Even though they offer lower THD, the presence of lower order harmonics is objectionable and harmonics elimination in Multilevel Inverters (MLIs) has been receiving immense attention for the past few decades. Existing Selective Harmonic Elimination (SHE) techniques can eliminate the objectionable lower order voltage harmonics with low switching frequency by solving the Fourier non-linear transcendental equations of the output voltage. The line current harmonics has a direct role to play on the magneto-motive force and results in increase of mismatching of air-gap permeance, vibrations, acoustic noise etc. This study proposes Normalized Least Mean Squares (NLMS) algorithm based scheme to eliminate the selected dominant harmonics in load current using only the knowledge of the frequencies to be eliminated. The algorithm is simulated using MATLAB/SIMULINK tool for a three-phase VSI to eliminate the fifth and seventh harmonics. The informative simulation results verify the validity and effectiveness of the proposed algorithm. The system performance is analyzed based on the simulation results considering Total Harmonic Distortion (THD), magnitude of eliminated harmonics and frequency spectrum.

A Simple and Direct Dead-Time Effect Compensation Scheme in PWM-VSI

This paper presents the direct compensation of the switching interval error of the effective voltage vectors by the dead time of a pulsewidth modulation voltage source inverter (PWM-VSI). The output voltages of a three-phase PWM-VSI are distorted and have voltage errors from the dead time to avoid the shoot-through of inverter arms and the time delay of the gate drive. Voltage distortion increases the harmonics of the output voltages and decreases control performance. This paper presents a simple and direct compensation technique to solve this problem in a three-phase VSI. The practical switching output voltages are determined by the dc-link voltage, the switching signals of each phase, the dead time, the time delay, and the current polarities of each phase. For these reasons, output voltage errors are not constant. In order to analyze the dead-time effect in the actual switching voltages of each phase, the practical switching voltages in a sampling period of a space vector PWM (SVPWM) method are calculated according to the current polarity. In the calculation, the dead time, the time delay of devices, and the voltage drops on power devices are included to consider nonlinear voltage distortion. From these practical switching voltages during the switching intervals in a sampling period, the average output voltages of each phase can be derived, and the output voltage errors between the voltage commands and the average output voltages of each phase are obtained. The SVPWM switching intervals of each phase can be derived by the average output voltages that are calculated according to the current polarity and nonlinear voltage distortion to compensate for the output voltage errors. With the simple detection of the current polarity, the practical errors of the switching intervals of each phase can be compensated by the addition of the compensated switching time. Simulation and experimental results validating the proposed compensation method are presented in this paper.

PWM strategies dedicated to three-phase two-levels VSI and their impact on AC drives

PWM strategies dedicated to three-phase two-levels VSI and their impact on AC drives

Compensation PWM Technique for Extended Output Voltage Range in Three-Phase VSI Using Three Shunt Resistors

This paper proposes a compensation PWM technique for the extension of output voltage ranges in three-phase VSI applications using three shunt resistors. The proposed technique aims to solve the dead zone, which occurs in high modulation indexes. In the dead zone, two phase currents cannot be sampled correctly, so that the three-phase VSI cannot be operated up to the maximum output voltage. The dead zone is analyzed in detail, and the compensation PWM algorithm is developed. The proposed algorithm is verified by numerical analysis and experimental results.

Circulating Current Produced in a System of two Inverters Connected in Parallel Due to a Difference Between the Zero-Vector Parameters

This paper analyzes the imbalances that produce circulating current in a system of two three-phase VSI with SVPWM modulation that, sharing the same DC link, is connected to a grid without galvanic isolation. This analysis has identified a principal imbalance: the difference between the zero-vector parameters of the two inverters. This imbalance is specific to the SVPWM modulation. The study proposes the correction of the imbalance by measurement algorithms and Proportional Integral Control (using the Ziegler Nichols method to tune the controller), in order to reduce or eliminate the circulation current and increase system performance. It provides a method that does not use an equivalent circuit or a model, determining the value of the imbalance directly and through a system output signal. It has been used PSIM simulation program (version 9.0.3.400), and the simulations have been taken into account an “ideal” environment. For all simulated cases, this paper analyzes the principal magnitudes and, to obtain the conclusions, shows power data (input power, output power and system performance), in uncontrolled and controlled operation. The simulations allow verifying the goodness of the proposed methods to detect, quantify, control and correct the imbalance, and to improve the system performance.

The Simulation of APF Based on Three-Phase VSI

In order to restrain harmonic pollution of power grid, the structure and control strategy of APF was researched. The structural parameters and method of direct current control of the most widely used APF with three-phase VSI was discussed. Decoupling control of active and reactive current on the dq plane was realized by dq transforming. Harmonic of load current was detected by Ip-Iq algorithm based on the instantaneous reactive power theory. Double closed-loop control was applied and PWM drive signals of IGBT were got through comparison of triangle wave and modulation wave. The simulation results demonstrate that the kind of control method make APF good dynamic response and static compensation.

Sample Time Staggered One-Cycle Control Based on Three-Phase H-Bridge Cascade VSI

The One-Cycle Control(OCC) technique not only provides fast dynamic response, but also can admirably suppress the perturbation yielded by dc source and eliminate the undesired harmonic contents.The cascade H-bridge VSI has very low dv/dt and distortion in the voltage output waveform.Sample time staggered one-cycle control（STS-OCC） based on three-phase H-bridge cascade VSI is proposed. It yields all of the advantages of the OCC and cascade VSI.The results of the simulation and analysis show that the STS-OCC technology has high equivalent work frequency, little switching loss and quick dynamic response speed, which means it is fit for the cascaded multilevel inverter.

Investigation of Discontinuous Space Vector PWM Techniques of a Three-Phase Voltage Source Inverter

Variable speed ac drives are nowadays the work horse of industry. To obtain variable voltage and frequency supply, inverters are the m ost com m on choice. Various pulse width m odulation (PWM) techniques have been developed for three phase voltage source inverters in the last decade. Space vector PWM technique is the m ost popular choice due to their easier digital implem entation and better dc bus utilization when com pared to t he mo st com m only used carrierbased PWM schem e. In discontinuous PWM m ode one of the leg of inverter is tied to either positive or negative rail of DC bus. This paper is devoted to the developm ent of Space vector PWM strategies in discontinuous m ode for three-phase VSIs. Discontinuous Space vector PWM offer the advantage of lower switching losses which is im portant especially in high switching frequency applications. The paper analyses various existing discontinuous PWM techniques based on harm onic perform ance of the output phase voltages. The harm onic perform ance indices chosen are total harm onic distortion, weighted total harm onic distortion and harm onic distortion factor. The perform ance is evaluated based on low-order harm onic content in the output phase voltages. Further few novel Space vector PWM m ethod in discontinuous m ode is proposed and analyzed. Perform ance com parison of the existing techniques and proposed schem es are presented. The com plete space vector m odel of a three-phase VSI is also presented. The analysis is done using Matlab sim ulation.

Micro-Stepping Control of a Two-Phase Linear Stepping Motor With Three-Phase VSI Inverter for High-Speed Applications

This paper presents a synchronous frame current control scheme for micro-stepping a two-phase linear stepping motor drive using a three-phase voltage-source inverter. Because of the wide operating frequency, the frequency-dependent voltages are decoupled from the controller to reduce the current-following errors and preserve the dynamic characteristics as the frequency varies. A motor cogging force compensation scheme performed in the synchronous frame is proposed to reduce the positioning error and velocity ripple caused by the cogging force. A space-vector pulse width modulation scheme is used for motor voltage modulation. This scheme is based on the harmonic injection principle originally derived for three-phase motor drives. Good static and dynamic performance is obtained in the experimental verifications.

An eight-switch three-phase VSI for power factor regulated shunt active filter

A three-phase neutral point clamped (NPC) inverter operated as a shunt ac line conditioner is presented. Eight power switches and four clamping diodes with voltage rating vdc/2 are used in the proposed inverter. The presented inverter can compensate current harmonics and reactive power generated from the nonlinear loads, and supply the demanded dc side power of the inverter. If there is no nonlinear load connected to the system, the adopted inverter is operated as a power factor pre-regulator. If there is no output load connected to the dc side of the inverter, the inverter is operated as a shunt active filter. If a nonlinear load is connected to the ac source and a dc load is connected to the inverter, the adopted inverter is operated as an integrated power quality compensator to draw the sinusoidal line currents from the ac mains. To supply the necessary active power for the dc side load and compensate the power losses of inverter, a proportional-integral (PI) controller is used to obtain the active power for the inverter. A space vector pulse-width modulation (SVPWM) is used to track the line current commands. Simulation and experimental results based on a laboratory scale-down prototype are presented to verify the effectiveness of the proposed control scheme.

Analysis and design of a series voltage unbalance compensator based on a three-phase VSI operating with unbalanced switching functions

Voltage unbalance in AC supply systems is typically corrected by means of a shunt connected thyristor-controlled static VAr compensator. This approach has the disadvantage of slow response, harmonic injection into the AC system, and the requirement for large passive components. The proposed system consists of a three-phase PWM voltage source inverter, connected in series with the line through a three-phase transformer. The unbalance compensation is achieved by canceling the negative sequence component of the line-to-line voltages of the source. It is also shown that by having the inverter operate with unbalanced switching functions, it is possible to balance the load voltage and to control the amplitude of the positive sequence component in order to perform load voltage regulation. A complete mathematical description of the method is presented, demonstrating that the compensation can be achieved with low kVA inverters and low harmonic injection. Implementation procedures, design equations, and a design example are also included in order to illustrate the proposed method. Experimental results of a 1.5 kVA laboratory prototype system confirm the feasibility of the technique. >